Single CMOS Sensor Integrating Analog and Digital Circuits for Noise Reduction

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Solution Overview

Problem

Conventional electro-optical readers for one-dimensional bar code symbols require multiple semiconductor chips, leading to increased power consumption, size, and noise susceptibility, making them less suitable for handheld applications.

Innovation Solution

A single CMOS chip integrates an analog front end, digital back end, and noise suppression circuitry, including a photodiode, sample-and-hold circuit, and analog-to-digital converter, to reduce noise and power consumption while maintaining image quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple semiconductor chips are used for CCD sensor (analog front end, digital back end, timing and control, noise suppression), then imaging quality and noise suppression are improved, but power consumption and device size increase

Engineering Contradiction:
Improveimaging qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple previously separate chips (analog front end, digital back end, timing and control, noise suppression) into a single integrated CMOS chip. This merging reduces the number of chips from four or more to one, thereby reducing overall power consumption and device size while maintaining imaging quality through integrated noise suppression circuitry.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single CMOS chip performs multiple functions that previously required separate chips: photodetection, analog signal processing, digital processing, timing control, and noise suppression. This multi-functional integration reduces power consumption by eliminating inter-chip communication and reducing the total number of active components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple semiconductor chips are used for CCD sensor, then imaging quality is improved, but device size and cost increase

Engineering Contradiction:
Improveimaging qualityVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates multiple separate chips into a single CMOS chip, reducing the physical device size. The analog front end, digital back end, timing and control circuits, and noise suppression functionality are all merged into one chip, eliminating the need for multiple chip mounts and interconnections.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If multiple semiconductor chips are used for CCD sensor, then noise suppression is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvenoise suppressionVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines noise suppression circuitry with other sensor functions in a single CMOS chip using standard fabrication processes. This eliminates the need to separately manufacture, test, and assemble multiple specialized chips, significantly reducing manufacturing complexity and cost while maintaining noise suppression performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from CCD technology requiring non-standard fabrication to CMOS technology using standard fabrication processes. This parameter change in the underlying technology enables easier manufacturing while integrating noise suppression functionality directly into the chip structure.

Inventive Principle:
Principle #35Parameter changes

4Use of energy by moving object

If CMOS sensor with integrated circuitry is used, then power consumption and size are reduced, but electrical noise increases

Engineering Contradiction:
Improvepower consumptionVSAvoidelectrical noise
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and separates noise suppression functionality into dedicated circuitry within the integrated chip. By providing specific noise suppression paths that isolate analog and digital sections, the design removes harmful electrical noise from the signal path while maintaining the power and size benefits of integration.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces intermediate noise suppression circuitry as a mediator between the analog front end and digital back end. This intermediary structure filters and suppresses electrical noise generated by digital switching activities before they can interfere with sensitive analog photodetection circuits, enabling safe integration on a single chip.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a compact, low-power, and noise-resistant imaging sensor that effectively reads one-dimensional bar code symbols, addressing the limitations of conventional CCD sensors in handheld devices.

Implementation Method 1

each pixel having a photodiode for converting incident light into an electrical analog signal

Methodology Applied
Scientific EffectPhotoelectric Effect: Photoelectric Effect

Data Source

PatentUS7446806B2Single chip, noise-resistant, one-dimensional, CMOS sensor for target imaging
Publication Date: 2008.11.04 SYMBOL TECHNOLOGIES LLC
  • US7446806B2 patent drawing
  • US7446806B2 patent drawing
  • US7446806B2 patent drawing

AI summary

A linear sensor array for imaging coded indicia includes an analog front end and a digital back end integrated on a single CMOS chip. A real-time, correlated double sampling circuit is used for noise suppression.