Single-Die Galvanic Isolation Using SOI and Deep Trenches
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Solution Overview
Problem
Existing galvanic isolation techniques for electrical circuits face challenges in effectively isolating different circuits while allowing signal and power transfer, particularly in integrated semiconductor dies, which can lead to issues like ground loops, electromagnetic interference, and safety hazards.
Innovation Solution
The use of dielectric-filled deep trenches and silicon-on-insulator structures to create galvanic isolation between device circuits within a single semiconductor die, utilizing dielectric layers and redistribution layers for capacitive or inductive coupling to enable signal exchange while blocking direct current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If galvanic isolation is implemented using separate semiconductor dies or chips, then electrical isolation between circuits is achieved, but device complexity and integration density increase
Solution Approach 1:
The patent merges previously separate semiconductor dies into a single integrated die by forming first and second circuits on the same semiconductor substrate. Deep isolation trenches are etched through the substrate to electrically isolate the two circuits while maintaining them on the same physical die, thereby combining multiple functions into one integrated structure while preserving galvanic isolation.
Solution Approach 2:
The semiconductor substrate is segmented into distinct isolated regions by etching deep isolation trenches that extend through the substrate thickness. These trenches physically divide the continuous substrate into electrically separate zones, allowing independent circuits to coexist on the same die without electrical interference while maintaining mechanical integration.
2Reliability
If deep isolation trenches are etched through the substrate, then galvanic isolation between circuits is enhanced, but manufacturing complexity and processing steps increase
Solution Approach 1:
The isolation trenches are formed at an early stage in the fabrication process, before the circuits are fully constructed. By pre-establishing the isolation structures, subsequent circuit formation steps can proceed independently in each region without requiring additional isolation processing, thereby simplifying the overall manufacturing sequence.
Solution Approach 2:
The deep isolation trenches act as intermediary structures that mediate between the substrate material and the isolated circuits. These trenches provide a physical and electrical barrier that enables independent processing and fabrication of separate circuits on the same substrate, facilitating manufacturing by creating clearly defined isolation boundaries.
3Reliability
If multiple dielectric layers are used for isolation, then DC blocking is improved, but AC signal transfer capability may be degraded
Solution Approach 1:
The patent applies different dielectric materials with optimized properties at different locations and depths within the isolation structure. By tailoring the dielectric characteristics locally within the trenches and at different interfaces, the structure achieves effective DC blocking while preserving AC signal transfer capabilities through carefully selected material properties at each level.
Solution Approach 2:
Multiple dielectric layers with different electrical properties are combined in the isolation structure to achieve both DC blocking and AC signal transfer. The composite dielectric structure leverages the complementary characteristics of different materials to simultaneously provide electrical isolation for direct current while maintaining signal integrity for alternating current applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively isolates high and low voltage device circuits in a single semiconductor die, preventing direct current circulation while allowing AC signal transfer, thus enhancing safety and reducing electromagnetic interference.
Implementation Method 1
A plurality of dielectric layers is disposed between the handle substrate and the silicon layer, and the first device circuit in the silicon layer is galvanically isolated from the second device circuit formed in the handle substrate by the plurality of dielectric layers coupling the handle substrate and the silicon layer
Implementation Method 2
utilizing dielectric layers and redistribution layers for capacitive or inductive coupling to enable signal exchange while blocking direct current flow
Implementation Method 3
utilizing dielectric layers and redistribution layers for capacitive or inductive coupling to enable signal exchange while blocking direct current flow
Data Source
AI summary
A semiconductor die includes a silicon layer. A first device circuit is formed in a first region at a first end of the silicon layer, and a second device circuit is formed in a second region at a second end of a silicon layer at a distance from the first region. The first end is opposite the second end, and the first device circuit is galvanically isolated from the second device circuit.