Single-Ended ADC With Thermometer Decoder for Low-Power Resolution

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Solution Overview

Problem

Prior art analog to digital converters (ADCs) are highly consumptive of power and provide relatively low resolution, making them unsuitable for applications with limited power budgets and requiring high performance and accuracy.

Innovation Solution

The development of novel ADC designs and architectures that enable high-resolution digital format data conversion with simultaneous drive and sense capabilities, utilizing a single line for both power provision and signal sensing, and incorporating non-linear N-bit digital to analog converters (DACs) to achieve broad dynamic range and low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If prior art ADC designs are used, then device complexity is reduced, but power consumption is high and resolution is low

Engineering Contradiction:
ImproveresolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The ADC is divided into multiple parallel sub-ADCs, each handling a portion of the input range. This segmentation allows each sub-ADC to operate at lower power while collectively achieving high resolution through the thermometer decoder that combines their outputs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new architectural dimension by using a thermometer decoder that maps multiple analog input ranges to digital outputs. This dimensional transformation enables high-resolution conversion without the traditional power consumption penalties by distributing the conversion workload across multiple parallel paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If prior art ADC designs are used, then device complexity is reduced, but measurement precision is low

Engineering Contradiction:
ImproveresolutionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The complex high-resolution conversion task is segmented into multiple simpler sub-ADC operations. Each sub-ADC handles a specific input range with simpler circuitry, and the thermometer decoder combines these segmented results to achieve the overall high resolution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple sub-ADC outputs are merged through the thermometer decoder to produce the final high-resolution digital output. This merging process combines the results from parallel simpler converters to achieve the precision of a much more complex single converter.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If single-ended architecture is used, then device complexity is reduced, but measurement precision is limited

Engineering Contradiction:
ImproveresolutionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent achieves high precision in a single-ended architecture by introducing a dimensional transformation through the thermometer decoder. This decoder creates a many-to-one mapping from multiple sub-ADC outputs that effectively synthesizes high-resolution data without requiring the complexity of differential architectures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11374585B2Single-ended linear current operative analog to digital converter (ADC) with thermometer decoder
Publication Date: 2022.06.28 SIGMASENSE LLC
  • US11374585B2 patent drawing
  • US11374585B2 patent drawing
  • US11374585B2 patent drawing

AI summary

A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.