Single-Ended Input Buffer with Capacitive Symmetry for High-Frequency Signals

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Solution Overview

Problem

Differential input buffers in integrated memory devices operate non-symmetrically when receiving single-ended input signals, leading to inconsistent responses to signal transitions, which affects their ability to handle higher frequencies effectively.

Innovation Solution

The implementation of capacitive coupling between the gates of transistors in a differential input buffer circuit, mimicking the operation of conventional differential amplifiers by simulating complementary input signals, ensures symmetrical operation even with single-ended inputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a differential input buffer uses a symmetrical structure with differential amplifiers, then it operates symmetrically when receiving complementary signals, but it responds non-symmetrically when receiving single-ended input signals

Engineering Contradiction:
Improvesymmetrical operationVSAvoidresponse consistency to signal transitions
Core Design Contradiction:
Stability of the object's compositionVSEase of operation

Solution Approach 1:

The patent introduces a coupling capacitor as an intermediary element that connects the single-ended input signal to both inputs of the differential amplifier. This capacitor acts as a mediator that transforms the single-ended signal into a form that can be processed symmetrically by the differential amplifier, allowing the buffer to respond consistently to signal transitions in both directions while maintaining the symmetrical structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If a differential input buffer is designed for high frequency operation, then it can handle higher frequencies, but it requires complementary input signals to maintain symmetrical operation

Engineering Contradiction:
Improvefrequency handling capabilityVSAvoidinput signal compatibility
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The patent makes the differential input buffer universal by enabling it to accept both complementary and single-ended input signals through the coupling capacitor configuration. The buffer maintains its high frequency capability while gaining the versatility to handle single-ended inputs, effectively serving multiple input signal types without sacrificing performance

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the input buffer to respond equally to transitions in both directions, enhancing its frequency handling capabilities and ensuring consistent signal processing, resulting in faster response times compared to traditional buffers.

Implementation Method 1

coupling a portion of the input signal, through a coupling capacitor, to the source/drain of the reference input transistor

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8036058B2Symmetrically operating single-ended input buffer devices and methods
Publication Date: 2011.10.11 MICRON TECHNOLOGY INC
  • US8036058B2 patent drawing
  • US8036058B2 patent drawing
  • US8036058B2 patent drawing

AI summary

Embodiments are described including those pertaining to an input buffer having first and second complementary input terminals. One such input buffer has a symmetrical response to a single input signal applied to the first input terminal by mimicking the transition of a signal applied to the second input terminal in the opposite direction. The aforementioned input buffer includes two amplifier circuits structured to be complementary with respect to each other. Each of the amplifier circuits includes a first transistor having a first input node that receives an input signal transitioning across a range of high and low voltage levels, and a second transistor having a second input node that receives a reference signal. The first input node is coupled to the second transistor through a capacitor that charges and discharges the drain of the second transistor responsive to the input signal transitioning to mimic the second input node transitioning in the direction opposite to the transition of the input signal, while the reference signal at the second input node is maintained at a constant voltage level.