Single-Ended Current ADC with Thermometer Decoding for Low-Power Resolution
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Solution Overview
Problem
Prior art analog to digital converters (ADCs) are power consumptive, provide low resolution, and fail to meet performance requirements in various applications due to inadequate power budget and resolution accuracy.
Innovation Solution
The development of a novel ADC design that enables high-resolution digital format data conversion with simultaneous drive and sense capabilities using a single line, incorporating a comparator and digital circuit to process analog signals into digital outputs with low power consumption, suitable for a broad range of applications including industrial and medical uses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If prior art ADC designs are used, then device complexity is reduced, but measurement precision and resolution are insufficient
Solution Approach 1:
The ADC is divided into multiple independent stages: a first ADC for coarse conversion and a second ADC for fine conversion. This segmentation allows each stage to operate with simpler circuitry while achieving high overall resolution through the combination of both stages, resolving the contradiction between measurement precision and device complexity.
Solution Approach 2:
The patent introduces a temporal dimension by processing signals in multiple sequential stages rather than attempting single-stage high-resolution conversion. The first ADC converts the analog signal to a coarse digital value, then the second ADC processes the residual signal for fine resolution, effectively trading time for resolution while keeping individual stages simple.
2Use of energy by moving object
If prior art ADC designs are used, then power consumption is high, but this conflicts with low-power application requirements
Solution Approach 1:
The power consumption problem is addressed by segmenting the conversion process into two stages, where each stage operates at lower power than a single high-resolution ADC would require. The first ADC handles the bulk of the conversion at moderate power, while the second ADC processes only the residual signal at low power, achieving high resolution with reduced total power consumption.
Solution Approach 2:
Instead of attempting to achieve full resolution in a single power-intensive stage, the patent applies partial action by having the first ADC perform coarse conversion and the second ADC perform only the necessary fine conversion on the residual signal, avoiding the excessive power consumption that would be required for a single-stage high-resolution ADC.
3Measurement precision
If single-ended linear current operative ADC with thermometer decoder is used, then resolution and power efficiency are improved, but device complexity increases
Solution Approach 1:
The thermometer decoder automatically generates the appropriate digital output code based on the comparator outputs without requiring complex external logic. Each comparator output directly feeds into the decoder, which self-configures to produce the correct binary or offset-binary code, reducing the need for additional control circuitry and simplifying the overall device complexity while maintaining high resolution.
Data Source
AI summary
A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.