Single-Ended to Differential Conversion With Stable Zero-Crossing
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Solution Overview
Problem
Existing single-ended to differential signal converters in Time to Digital Converters (TDCs) suffer from low linearity and unstable zero-crossing properties due to non-ideal delay compensation, leading to degraded performance in PLL and system stability.
Innovation Solution
A signal converter device comprising a frequency multiplier and a fully symmetrical differential frequency divider, which multiplies and divides the single-ended signal by two to generate a differential signal with stable zero-crossing properties, eliminating the need for signal inversion and delay compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional inversion-based methods are used to generate complementary phases, then the differential signal can be produced, but the zero-crossing properties become unstable and linearity degrades due to non-ideal delay compensation
Solution Approach 1:
The patent extracts and eliminates the problematic inversion-based delay compensation mechanism from the signal conversion path. By removing the inverting circuit and its associated delay compensation requirements, the design achieves stable zero-crossing properties without the complexity of tuning and compensating for inversion delays.
Solution Approach 2:
Instead of using signal inversion to generate complementary phases, the patent inverts the approach by using direct differential signaling throughout the signal path. The differential buffer directly drives the output without inversion, and any required phase inversion is achieved through symmetric delay elements rather than active inverting circuits.
2Manufacturing precision
If inverting circuits are used to generate complementary phases, then differential signals can be produced, but linearity and Zero-Crossing stability are reduced
Solution Approach 1:
The patent removes the inverting circuit from the signal conversion architecture. By eliminating the inversion stage, the design achieves superior linearity as there are no additional non-idealities introduced by the inverting circuit and its associated delay compensation mechanisms.
3Measurement precision
If delay compensation techniques are applied to stabilize zero-crossing properties, then some stability can be achieved, but the compensation is never ideal and ZC properties remain inaccurate
Solution Approach 1:
The patent extracts and eliminates the entire delay compensation mechanism from the design. By removing the need for compensation, the design achieves ideal zero-crossing properties directly through symmetric differential signaling, avoiding the inherent inaccuracies of any compensation approach.
Solution Approach 2:
The patent creates equipotential conditions in the signal path by ensuring symmetric delay characteristics in the differential buffer and subsequent stages. This symmetry ensures that both differential signals experience identical propagation delays, achieving ideal zero-crossing alignment without requiring active compensation.
4Reliability
If non-symmetrical paths are used in differential signal generation, then circuit implementation is simplified, but stable differential output zero-crossing at half supply voltage becomes difficult to obtain
Solution Approach 1:
The patent intentionally introduces controlled asymmetry in the form of symmetric delay elements (one in each differential path) to compensate for inherent process variations and mismatches. This deliberate asymmetric adjustment achieves perfect symmetry in the overall signal paths, ensuring stable zero-crossing properties at the differential output.
Data Source
AI summary
It is described a signal converter device (100) for converting a single-ended signal to a differential signal, the device (100) comprising:i) a multiplier device (110), configured toreceive a single-ended incoming signal (105), andmultiply the incoming signal (105) to provide a multiplied signal (115); andii) a divider device (120), configured toreceive the multiplied signal (115), anddivide the multiplied signal (115) to provide a differential signal (125a, 125b).Further, a corresponding signal conversion method is described.