Single-Ended Chip Links Using Self-Referenced Voltage Balancing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In computing systems, data transfer between agents and endpoints on System on Chips (SoCs) faces challenges due to power supply variations and cross-coupling capacitance, leading to signal latency and corruption, especially when using single-ended signaling over metal traces.

Innovation Solution

A computing system design that employs multiple lanes for data transport, where the source generates code words using a lookup table to maintain a constant reference voltage at the destination, utilizing integrating capacitors and termination resistors to mitigate signal variations, and maps data words to code words to ensure balanced Boolean ones and zeroes, reducing signal degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If single-ended signaling is used over metal traces for data transport, then device complexity is reduced, but signal corruption and latency increase due to power supply variations and cross-coupling capacitance

Engineering Contradiction:
Improvesignaling complexityVSAvoidsignal integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

An intermediary reference voltage signal is introduced that is dynamically adjusted to track power supply variations. This reference voltage acts as a mediator between the transmitted data signal and the receiver, compensating for power supply noise and cross-coupling effects without requiring complex differential signaling architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

A feedback mechanism is implemented where the reference voltage is continuously monitored and adjusted based on detected signal quality. The system uses the received signal to update the reference voltage level, creating a closed-loop system that adapts to changing power supply conditions and maintains signal integrity

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If separate power supplies are used at source and destination, then adaptability is improved, but signal reliability deteriorates due to power supply variations causing signal corruption

Engineering Contradiction:
Improvepower supply independenceVSAvoiddata transfer reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Preliminary calibration is performed to establish the relationship between source and destination power supplies. The system pre-characterizes power supply variations and stores compensation data that is applied during normal operation, enabling reliable communication between independently powered components

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A feedback loop continuously monitors the reference voltage and adjusts it to compensate for power supply differences. The system uses feedback from the received signal quality to dynamically update the reference voltage, maintaining data transfer reliability despite independent power supply variations

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If code word mapping is used to maintain constant reference voltage, then signal stability is improved, but device complexity increases due to lookup tables and mapping logic

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidmapping logic complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

Code word mapping tables are pre-computed and stored during fabrication or initialization. The mapping relationships that would otherwise require complex real-time calculations are prepared in advance, allowing the system to maintain stable reference voltage through simple table lookups during operation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The complex mapping logic is replaced by copying pre-computed lookup tables into the device. Instead of implementing complex real-time mapping algorithms, the system uses stored mapping tables that replicate the desired voltage stabilization behavior, reducing computational complexity while maintaining stability

Inventive Principle:
Principle #26Copying

4Reliability

If integrating capacitor is used to generate reference voltage from received signals, then signal integrity is improved, but device complexity increases due to additional circuit components

Engineering Contradiction:
Improvesignal reconstruction accuracyVSAvoidreceiver circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The integrating capacitor circuit is designed to perform multiple functions: it integrates the received signal to generate the reference voltage, filters noise from the signal, and provides voltage stabilization. This multi-functional design reduces the need for separate dedicated circuits for each function, offsetting the complexity increase with functional consolidation

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces signal latency and corruption by maintaining a constant reference voltage and balancing signal patterns, ensuring reliable data transfer across the SoC, even with different power supplies and varying capacitance effects.

Implementation Method 1

Each of the receivers in the destination has a respective termination resistor connected to a single integrating capacitor. The integrating capacitor provides a reference voltage to the plurality of receivers.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10756849B2Self referenced single-ended chip to chip communication
Publication Date: 2020.08.25 APPLE INC
  • US10756849B2 patent drawing
  • US10756849B2 patent drawing
  • US10756849B2 patent drawing

AI summary

A system and method for efficiently transporting data in a computing system are contemplated. In various embodiments, a computing system includes a source, a destination and multiple lanes between them for transporting data. Multiple receivers in the destination has a respective termination resistor connected to a single integrating capacitor, which provides a reference voltage to the multiple receivers. The receivers reconstruct the received data by comparing the corresponding input signals to the reference voltage. The source includes a table storing code words. The source maps a generated data word to a code word, which is sent to the destination. The destination maps the received code word to the data word. The values of the code words are selected to maintain a nearly same number of Boolean ones on the multiple lanes over time as a number of Boolean zeroes.