Single-Layer Cu Wiring Barrier-Liner for Low-Resistance Interconnects
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Solution Overview
Problem
The existing semiconductor device wiring structures require two separate layers for diffusion barrier and liner functions, which occupy a small volume ratio, leading to increased wiring resistance in advanced technology nodes, particularly at 10 nm or less.
Innovation Solution
A single-layer diffusion barrier layer with an amorphous structure is formed using specific metal alloys, combining a first metal (Co, Ru, or Mo) with a second element (Zr, Al, Nb, Y, or B) to provide both diffusion barrier and liner functions, ensuring high adhesion and wettability with copper.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two separate layers (diffusion barrier layer and liner layer) are formed in the wiring trench, then the diffusion barrier function and adhesion to copper are improved, but the volume ratio of copper wiring fill is reduced
Solution Approach 1:
The invention combines the diffusion barrier layer and liner layer into a single integrated layer. This single layer simultaneously provides diffusion barrier functionality (preventing Cu-SiO2 diffusion) and liner functionality (providing adhesion and wettability to copper), thereby eliminating the space occupied by the second layer and increasing the copper wiring volume ratio while maintaining both protective functions.
Solution Approach 2:
The single layer is designed to perform multiple functions: it acts as both a diffusion barrier (blocking copper and silicon oxide diffusion) and a liner (providing adhesion and wettability to copper wiring). This multi-functional design allows one layer to replace two separate layers, maximizing the copper fill volume while ensuring both diffusion prevention and proper copper adhesion.
2Reliability
If two separate layers (diffusion barrier layer and liner layer) are formed in the wiring trench, then the adhesion and wettability to copper are improved, but the wiring resistance increases due to reduced copper volume
Solution Approach 1:
The invention merges the adhesion-promoting liner layer and the diffusion barrier layer into a single integrated layer. This unified structure maintains the adhesion and wettability properties needed for copper bonding while eliminating the additional interface and space that would otherwise reduce the effective copper cross-sectional area, thereby preventing excessive wiring resistance.
Solution Approach 2:
The single layer is engineered to simultaneously provide adhesion/wettability to copper (liner function) and diffusion barrier properties. By consolidating these functions, the structure ensures proper copper adhesion without sacrificing the copper volume needed to maintain low wiring resistance, thus achieving both adhesion requirements and electrical performance.
3Productivity
If the technology node is miniaturized to 10 nm or less, then the integration density is improved, but the wiring resistance increases significantly due to reduced copper fill volume
Solution Approach 1:
At 10 nm technology nodes and below, the invention combines the diffusion barrier and liner layers into a single layer to maximize the copper fill volume within the constrained wiring trench dimensions. This merging is critical at such small scales where even minor reductions in copper volume would cause unacceptable increases in wiring resistance, while still maintaining the necessary diffusion barrier and adhesion functions.
Solution Approach 2:
The single layer performs both diffusion barrier and liner functions, which is particularly important at 10 nm nodes where space is extremely limited. This multi-functional approach ensures that the maximum possible volume is available for copper conductors while still providing both diffusion prevention and proper copper adhesion, thus maintaining acceptable wiring resistance despite the miniaturization.
Data Source
AI summary
Provided is a semiconductor device, which has a wiring structure including a single-layer diffusion barrier layer having both a diffusion barrier function and a liner function. The semiconductor device has a wiring structure including an insulating layer, a conductive wiring, and a diffusion barrier layer disposed between the insulating layer and the conductive wiring in a manner of being in contact with both the insulating layer and the conductive wiring. The diffusion barrier layer is made of an alloy having an amorphous structure containing a first metal and a second element in an amount of 90% by mass or more in total. The first metal is any one selected from Co, Ru, and Mo. The second element is one or two or more selected from Zr, Al, and Nb when the first metal is Co, the second element is Zr when the first metal is Ru, and the second element is one or two selected from Y and B when the first metal is Mo.