Single Layer RDL SiP Embedding Components for Compact Mobile Packaging
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Solution Overview
Problem
The challenge is to develop packaging solutions for mobile electronic devices that minimize size while integrating multiple components into a single package, reducing system board space and board mounted height, while also improving system performance and reducing costs.
Innovation Solution
The approach involves assembling active and passive device components with different form factors on a substrate, molding using a compound layer, forming a single redistribution layer, and bonding a system-on-chip die to this layer, which allows for integration of components in a System in Package (SiP) with reduced form factor and lower costs, along with improved interconnects for enhanced performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple components are integrated into a single package to reduce system board space, then board space is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent embeds multiple device components (RF components, passive components, antennas) within a single molding compound layer, creating a nested structure where components are housed inside the package. This nesting approach consolidates multiple separate components into one integrated unit, reducing board space while managing complexity through systematic integration.
Solution Approach 2:
The patent combines multiple device components, interconnect structures, and packaging elements into a single System in Package (SiP) unit. By merging RF components, passive components, antennas, and interconnects into one integrated package, the solution reduces the number of separate board-mounted components while providing a comprehensive packaging solution that addresses both space and complexity concerns.
2Device complexity
If a single redistribution layer is used to reduce manufacturing steps, then manufacturing complexity is reduced, but interconnect performance may be compromised
Solution Approach 1:
The patent implements a single redistribution layer with locally optimized conductive pathways that are specifically designed to route signals between different device components embedded within the package. Rather than using multiple uniform layers, the single layer is strategically configured with varying trace patterns, via locations, and connection points to achieve appropriate signal routing and electrical performance for each component interface.
Solution Approach 2:
The redistribution layer acts as an intermediary structure that facilitates electrical connections between the embedded device components and the external package interfaces. This single intermediate layer mediates the complex interconnect requirements by providing a consolidated routing path that connects RF components, passive components, and antennas to their respective external interfaces without requiring multiple separate redistribution layers.
Data Source
AI summary
In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.