Single-Level Cell Program Timing With Charge Pump Skipping

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing non-volatile memory technologies face challenges in achieving faster data reading and programming speeds while maintaining data integrity, particularly due to inefficiencies in the preliminary period of program operations and high current consumption during charge pump settings and resets.

Innovation Solution

The implementation of a control circuit that applies a series of program voltage pulses with a preliminary period optimized by skipping charge pump settings and resets after the first pulse, reducing unnecessary time and current consumption without increasing failure bit counts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If charge pump settings and resets are performed before each program voltage pulse, then programming reliability is maintained, but programming speed decreases and power consumption increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidprogramming speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the charge pump setting and reset operations from the preliminary period before each program voltage pulse. By removing these operations from the critical programming path and performing them only when necessary (e.g., on the first pulse or after idle periods), the patent eliminates unnecessary delays and power consumption while maintaining the reliability benefits when actually needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements periodic charge pump settings and resets based on the programming sequence pattern. Instead of performing these operations before every pulse, the system performs them periodically - specifically on the first pulse of a sequence and after idle periods - allowing continuous programming without repeated setup overhead while maintaining reliability through periodic reinitialization.

Inventive Principle:
Principle #19Periodic action

2Reliability

If charge pump settings and resets are performed before each program voltage pulse, then programming reliability is maintained, but power consumption increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent removes unnecessary charge pump setting and reset operations from the programming sequence, extracting only the essential operations that contribute to reliability. By performing these operations selectively rather than repeatedly, the patent significantly reduces the energy consumed by the charge pump while maintaining the necessary reliability guarantees.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by performing charge pump settings and resets only to the extent necessary for reliability - specifically on the first pulse and after idle periods - rather than performing excessive actions before every single program pulse. This partial approach eliminates wasted energy while preserving the reliability benefits.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If preliminary period time is increased, then programming reliability is improved, but programming speed decreases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent skips the preliminary period charge pump settings and resets for subsequent program voltage pulses after the first one. By rushing through these unnecessary operations and eliminating them from the timing-critical path, the patent minimizes the preliminary period duration and maximizes programming speed while maintaining reliability through selective reinitialization.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS12462876B2Single-level cell pump skip program operation preliminary period timing optimization for non-volatile memory
Publication Date: 2025.11.04 SANDISK TECHNOLOGIES LLC
  • US12462876B2 patent drawing
  • US12462876B2 patent drawing
  • US12462876B2 patent drawing

AI summary

A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the word lines and the strings and is configured to successively apply one of a series of pulses of a program voltage to each selected one of the word lines to program the memory cells connected thereto during a program operation. The control means is also configured to utilize a time of a preliminary period of the program operation based on the one of the series of pulses of the program voltage being applied. The preliminary period of the program operation is before the series of pulses of the program voltage are applied to each selected one of the plurality of word lines.