Single-Line Bus Time-Distance Coding for Low Pin-Count Data Communication

The patent merges multiple signal lines (data, address, control) into a single shared bus line. System modules multiplex these functions by time-division, where different modules transmit different types of signals at different times. This consolidation reduces the physical pin count while maintaining communication reliability through protocol-based coordination.

The bus system transitions from static dedicated lines to dynamic shared access. Modules dynamically request and transmit data, addresses, or control signals based on current needs. The single bus line adapts its function dynamically through time-division multiplexing, allowing reliable communication without fixed dedicated lines for each function.

Each system module generates its own timing signals locally without requiring external precise clock references. The modules self-synchronize by detecting the rising edge of the bus signal and using their internal oscillators to generate timing references. This self-service approach eliminates the need for shared crystal clocks while maintaining accurate data transmission through consistent local timing.

The system changes the timing reference parameter from external precise clocks to internal oscillator-based timing. Each module uses its own frequency reference, and the protocol accommodates variations by synchronizing to the bus signal's rising edges. This parameter change maintains transmission accuracy without requiring high-precision external timing references.