Single PCIe Test Card with Multiple Ports for Parallel Server Slot Testing
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Solution Overview
Problem
Current PCIe testing methodologies require multiple test cards to be used for each PCIe slot on a server, resulting in inefficient use of components and increased power consumption, as only one port of each test card is utilized while the others remain unused.
Innovation Solution
A system that uses a single PCIe test card with multiple ports to connect to all PCIe slots on a server via customized cables, allowing for simultaneous testing of multiple slots without the need for multiple test cards, thereby reducing the number of test cards and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple PCIe test cards are used to test multiple PCIe slots, then each slot can be tested independently, but the number of test cards increases and power consumption increases
Solution Approach 1:
The patent combines multiple test card functionalities into a single test card by integrating multiple ports (e.g., 4 ports) on one card to test multiple PCIe slots simultaneously. This merging approach reduces the total number of test cards from N (one per slot) to 1, thereby reducing power consumption while maintaining comprehensive testing capability across all slots.
Solution Approach 2:
The test card is designed with multi-functionality, where a single card can test multiple PCIe slots through its multiple ports. Each port can be independently configured to test different slots, allowing one test card to perform the work of multiple dedicated test cards, thus improving energy efficiency without compromising testing reliability.
2Reliability
If multiple PCIe test cards are used, then each slot has dedicated testing capability, but the quantity of test cards increases
Solution Approach 1:
The patent merges multiple test card units into a single integrated test card that features multiple ports. This single card with multiple ports replaces what would traditionally require multiple separate test cards, reducing the quantity of test cards from N to 1 while maintaining the ability to test all PCIe slots comprehensively.
Solution Approach 2:
The test card is designed as a universal testing device that can interface with multiple PCIe slots through its multiple ports. This multi-functional design allows one test card to perform testing across all slots, eliminating the need for multiple dedicated test cards and reducing overall component quantity.
3Ease of operation
If only one port on each test card is used, then each PCIe slot can be tested individually, but the other ports on the test card remain unused
Solution Approach 1:
The test card is designed with multiple ports that can each be independently utilized to test different PCIe slots. This multi-functional design ensures that all ports on the test card are actively used, maximizing test card utilization efficiency. Each port maintains individual testing capability while the card as a whole achieves full utilization of all its ports across multiple slot tests.
Solution Approach 2:
The patent combines multiple port functionalities into a single test card, allowing all ports to be simultaneously or sequentially utilized for testing different PCIe slots. This eliminates the waste of unused ports that occurs when one test card is dedicated to one slot, thereby improving overall productivity and resource utilization.
Data Source
AI summary
One aspect provides a method and system for saturation of multiple I/O slots by multiple testing ports and verification of link health in between. During operation, the system detects a testing card with a plurality of test ports which are coupled to a plurality of input/output (I/O) slots of a computing device. The system communicates with the plurality of test ports via the plurality of I/O slots. The system generates, by the computing device, a script for each test port, wherein the script comprises a series of read and write operations to be executed by the testing card on a memory device associated with the computing device. The system allows the plurality of test ports to execute the script and perform the corresponding read operations and write operations, thereby facilitating testing of the I/O slots of the computing device in parallel by the test ports of the single testing card.


