Single Photomask Multiple Patterning Semiconductor Fabrication
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Solution Overview
Problem
The increasing dimensions of integrated circuit devices have reached the limits of optical scaling in photolithographic processes, leading to a higher number of photomasks required and increased costs, necessitating a more efficient method for semiconductor device fabrication.
Innovation Solution
A method involving the use of a single photomask to pattern multiple photoresist layers, including hybrid and positive/negative tone photoresists, to form various semiconductor structures such as deep trench isolation, doped wells, and gate dielectric layers, allowing for reduced photomask usage and alignment complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If traditional photolithographic scaling is used to decrease device dimensions, then device density increases, but the number of photomasks required increases and cost increases
Solution Approach 1:
The patent combines multiple patterning operations into a single photomask by using different photoresist layers (positive tone and negative tone) that respond differently to the same exposure. This merging allows features that would traditionally require separate masks to be formed simultaneously, reducing the total number of photomasks needed while maintaining device density improvements
Solution Approach 2:
The single photomask serves multiple functions by exposing different photoresist layers with different tone responses to the same pattern. The same mask pattern creates both positive and negative tone features in different regions, allowing one mask to perform the work of multiple masks and reducing overall fabrication complexity
2Area of moving object
If traditional photolithographic scaling is used to decrease device dimensions, then device density increases, but photomask cost increases
Solution Approach 1:
The patent merges multiple mask functions into a single photomask by utilizing differential photoresist responses. This consolidation reduces the total number of expensive photomasks that need to be fabricated, aligned, and processed, directly lowering photomask costs while achieving the same device dimension reduction
Solution Approach 2:
The invention creates complementary patterns using the same photomask image through different photoresist responses. Instead of requiring multiple physical masks, the system uses optical copying of the same pattern into different photoresist layers with opposite tone responses, eliminating the need for additional mask fabrication costs
3Manufacturing precision
If multiple photomasks are used to pattern photoresist layers, then device structures can be formed, but alignment complexity increases
Solution Approach 1:
The patent merges multiple alignment operations into a single photomask alignment step. By using the same mask for both positive and negative tone photoresist layers, the system eliminates the need for multiple sequential alignments, reducing alignment complexity while maintaining the precision needed to form complex device structures
Solution Approach 2:
The invention segments the photoresist layer into different tone regions (positive and negative) that respond differently to the same exposure. This segmentation allows different features to be formed from a single mask pattern without requiring multiple alignment steps, simplifying the overall alignment process while maintaining manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the efficient fabrication of semiconductor devices with reduced photomask costs and complexity, while maintaining precise alignment and structure formation, thereby overcoming the limitations of traditional photolithographic scaling.
Implementation Method 1
patterning the first photoresist layer using a photomask to form a first patterned photoresist layer
Implementation Method 2
performing an ion implantation to form a doped well in the base layer
Data Source
AI summary
A method of forming different structures of a semiconductor device using a single mask and a hybrid photoresist. The method includes: applying a first photoresist layer on a semiconductor substrate; patterning the first photoresist layer using a photomask to form a first patterned photoresist layer; using the first patterned photoresist layer to form a first structure of a semiconductor device; removing the first patterned photoresist layer; applying a second photoresist layer on the semiconductor substrate; patterning the second photoresist layer using the photomask to form a second patterned photoresist layer; using the second patterned photoresist layer to form a second structure of a semiconductor device; removing the second patterned photoresist layer; and wherein either the first or the second photoresist layer is a hybrid photoresist layer comprising a hybrid photoresist.


