Single-Pin Crystal Oscillator Buffer With Dynamic Feedback Start-Up
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Modern integrated circuits face challenges in designing output buffers for single-pin crystal oscillators that prevent self-oscillation, ensure fast start-up, and maintain low output phase noise, especially in low-supply-voltage environments where active devices operate with small headroom voltages.
Innovation Solution
The output buffer includes a plurality of inverters with adjustable feedback loops, where the feedback level changes in response to a control signal, disabling global feedback during start-up to prevent self-oscillation and enabling it later to ensure correct frequency and low phase noise, with a digital control signal managing the loop gain and feedback levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If global feedback is applied around inverters in the output buffer, then output phase noise is reduced and duty cycle is optimized, but self-oscillation occurs during start-up that interferes with normal oscillator operation
Solution Approach 1:
The patent applies preliminary action by detecting the start-up state of the oscillator and temporarily disabling the global feedback path before the oscillator reaches its operating frequency. This prevents self-oscillation from occurring in the first place during the critical start-up phase, while allowing the global feedback to be enabled later to reduce phase noise and optimize duty cycle during normal operation.
Solution Approach 2:
The patent implements dynamics by making the feedback path configurable - the global feedback is dynamically enabled or disabled based on the oscillator's operational state. During start-up, the feedback is disabled to prevent self-oscillation; once the oscillator stabilizes, the feedback is enabled to improve output characteristics. This dynamic control resolves the contradiction between preventing self-oscillation and reducing phase noise.
2Stability of the object's composition
If AC-coupling capacitor is used at the input of the buffer, then output signal duty cycle is optimized, but self-oscillation signal is generated that may cause incorrect start-up on harmonic frequency
Solution Approach 1:
The patent applies preliminary action by detecting the oscillator start-up state and temporarily disabling the global feedback path that contains the AC-coupling capacitor before the oscillator reaches its operating frequency. This prevents the AC-coupling capacitor from generating self-oscillation signals during the critical start-up phase that could cause incorrect harmonic frequency start-up, while allowing it to be enabled later to optimize duty cycle during normal operation.
Solution Approach 2:
The patent implements dynamics by making the feedback path with the AC-coupling capacitor configurable - it is dynamically disabled during start-up to prevent harmful self-oscillation and dynamically enabled during normal operation to optimize duty cycle. This dynamic control resolves the contradiction between duty cycle optimization and reliable start-up.
3Device complexity
If single pin is used for connecting the resonator, then pin count is reduced, but circuit implementation becomes challenging in low-supply-voltage environments
Solution Approach 1:
The patent applies merging by combining multiple functions into a single pin connection. The single pin serves as both the input for the resonator and the output for the buffered signal. The output buffer circuit internally handles the signal conditioning, level shifting, and drive capability enhancement that would otherwise require separate components or pins, thus reducing pin count while maintaining functionality in low-supply-voltage environments.
Solution Approach 2:
The patent introduces an output buffer as an intermediary circuit between the resonator and the external digital circuits. This intermediary buffer handles the challenging low-supply-voltage conditions by providing proper signal levels and drive capability, making the single-pin connection feasible despite the circuit implementation challenges it presents.
Data Source
AI summary
An output buffer for an oscillator circuit and associated methodology. The output buffer has inverters and at least one negative feedback loop coupled to corresponding inverters. The negative feedback loop of the circuit is disabled in response to a control signal until one or more of a defined level of oscillation and a defined period of time is reached during start-up of the oscillator circuit, and is thereafter enabled. At least one of the inverters has at least one second negative feedback loop coupled to the corresponding inverter. An amount of feedback provided by the second negative feedback loop is adjustable in response to a control signal, where a first feedback level is present until a defined level of oscillation and/or a defined period of time is reached during start-up, a second feedback level is thereafter present in, and the first feedback level is less than the second feedback level.