Single-Polarity Level Shifter for Negative Voltage Translation

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Solution Overview

Problem

Level shifting in a negative potential direction using a single-polarity transistor, particularly n-channel transistors, is challenging due to susceptibility to noise and difficulty in responding to potential changes after level shifting.

Innovation Solution

A semiconductor device incorporating a first and second source follower and a comparator, where each transistor includes a metal oxide in the channel formation region, enables level shifting by comparing output potentials and outputting digital signals using different power supply potentials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-polarity transistor (n-channel) is used for level shifting, then device simplicity is improved, but level shifting in negative potential direction becomes difficult and noise susceptibility increases

Engineering Contradiction:
Improvetransistor configurationVSAvoidnoise resistance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The level shifter is divided into two independent source follower circuits: a first source follower for level shifting in the positive potential direction and a second source follower for level shifting in the negative potential direction. Each source follower handles one direction of level shifting, allowing the circuit to achieve bidirectional level shifting capability while maintaining the simplicity of single-polarity transistor usage. This segmentation resolves the contradiction by enabling negative potential direction level shifting without requiring complex circuit configurations.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a single-polarity transistor is used for level shifting, then device simplicity is improved, but responsiveness to potential changes deteriorates

Engineering Contradiction:
Improvetransistor configurationVSAvoidresponsiveness to potential changes
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

By segmenting the level shifter into two dedicated source followers, each optimized for a specific direction of potential change, the circuit can respond more quickly to potential changes in either direction. The first source follower responds to positive potential changes while the second source follower responds to negative potential changes, improving overall responsiveness without increasing device complexity.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If level shifting in negative potential direction is attempted using conventional methods, then level shifting capability is improved, but noise susceptibility increases

Engineering Contradiction:
Improvelevel shifting capabilityVSAvoidnoise susceptibility
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The segmentation into two dedicated source followers isolates the negative potential direction level shifting function in the second source follower, which is specifically designed to handle this operation. This dedicated configuration reduces noise susceptibility by avoiding the noise-prone configurations that would otherwise be required to achieve negative potential direction level shifting in a single-polarity transistor circuit.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11296701B2Single-polarity level shifter circuit and semiconductor device
Publication Date: 2022.04.05 SEMICON ENERGY LAB CO LTD
  • US11296701B2 patent drawing
  • US11296701B2 patent drawing
  • US11296701B2 patent drawing

AI summary

A semiconductor device capable of level shifting in a negative potential direction using an n-channel transistor is provided. The semiconductor device includes a first source follower, a second source follower, and a comparator. The first source follower is supplied with a second high power supply potential and a low power supply potential; the second source follower is supplied with a first high power supply potential and the low power supply potential; and a digital signal which expresses a high level or a low level using the second high power supply potential or the first high power supply potential is input to the first source follower. Here, the second high power supply potential is a potential higher than the first high power supply potential, and the first high power supply potential is a potential higher than the low power supply potential. The comparator compares output potentials of the first source follower and the second source follower and outputs a digital signal which expresses a high level or a low level using the first high power supply potential or the low power supply potential.