Single-Poly EEPROM With Dual Tunneling Regions

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Solution Overview

Problem

Existing single-poly EEPROM devices require large areas for accurate analog adjustments and voltage trimming due to high voltage requirements, while double-poly EEPROMs are costly due to additional processing operations, necessitating a cost-effective and compact solution for precise threshold voltage adjustment.

Innovation Solution

A single-poly EEPROM memory device with two tunneling regions and a floating gate, allowing for precise threshold voltage adjustment by applying different potentials to the tunneling regions and control gate, reducing the need for extensive area and complex processing, and utilizing a high-quality gate oxide for reliable operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If single-poly EEPROM is used for accurate analog adjustments and voltage trimming, then manufacturing cost is reduced and fabrication process is simplified, but device area increases due to high voltage requirements

Engineering Contradiction:

Improvefabrication process simplicityVSAvoiddevice area

Core Design Contradiction:

Ease of manufactureVSArea of stationary object

Solution Approach 1:

The tunneling structure is divided into two separate tunneling regions instead of one large region, allowing each region to be optimized independently and reducing the overall area required for accurate analog adjustments while maintaining the single-poly fabrication process

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from a planar single-tunneling-region layout to a three-dimensional structure with two tunneling regions positioned at different locations, enabling more efficient use of device area while maintaining the simplified single-poly manufacturing process

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If double-poly EEPROM is used for accurate analog adjustments, then device area is reduced, but manufacturing cost increases due to additional processing operations

Engineering Contradiction:

Improvedevice areaVSAvoidmanufacturing cost

Core Design Contradiction:

Area of stationary objectVSEase of manufacture

Solution Approach 1:

The patent applies different doping concentrations and geometries to the two tunneling regions to optimize their individual performance for specific analog adjustment functions, achieving accurate trimming in a compact area while maintaining single-poly fabrication

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent varies the geometric parameters and electrical characteristics of the two tunneling regions to achieve precise threshold voltage control and accurate analog adjustments, accomplishing what traditionally required double-poly processes but using only single-poly fabrication

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If single-poly EEPROM is used with traditional single tunneling region, then manufacturing cost is reduced, but measurement precision of threshold voltage adjustment decreases

Engineering Contradiction:

Improvemanufacturing costVSAvoidthreshold voltage adjustment accuracy

Core Design Contradiction:

Ease of manufactureVSMeasurement precision

Solution Approach 1:

The single tunneling region is segmented into two separate tunneling regions, each contributing to the overall threshold voltage control. This segmentation enables finer resolution and more accurate analog adjustments while maintaining cost-effective single-poly manufacturing

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The two tunneling regions provide independent control mechanisms that enable precise feedback control of the threshold voltage, allowing for accurate analog adjustments and trimming operations at low cost

Inventive Principle:

Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a compact, cost-effective single-poly EEPROM device capable of precise threshold voltage adjustment, reducing overall device area and manufacturing costs while maintaining high accuracy and reliability for analog trimming and voltage reference applications.

Implementation Method 1

a floating gate overlying a portion of the control gate, the read transistor, and the first and second tunneling regions

Methodology Applied

Scientific EffectElectrostatic field: Electric Field

Implementation Method 2

first and second tunneling regions isolated from one another within the semiconductor body

Methodology Applied

Scientific EffectQuantum tunneling:

Data Source

PatentUS7813177B2Analog single-poly EEPROM incorporating two tunneling regions for programming the memory device

Publication Date: 2010.10.12 TEXAS INSTRUMENTS INC

AI summary

A single-poly EEPROM memory device comprises a control gate isolated within a well of a first conductivity type in a semiconductor body of a second conductivity type, first and second tunneling regions isolated from one another within respective wells of the first conductivity type in the semiconductor body, a read transistor isolated within a well of the first conductivity type, and a floating gate overlying a portion of the control gate, the read transistor, and the first and second tunneling regions. The memory device is configured to be electrically programmed by changing a charge on the floating gate that changes the device threshold voltage. In one embodiment, the memory device is configured to be electrically programmed by applying a first potential between the first and second tunneling regions, and a second potential to the control gate, the second potential having a value less than the first potential.