Single-Poly NVM Gate Oxide Layout for Simpler Fabrication

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Solution Overview

Problem

The manufacturing of non-volatile memory (NVM) devices with multiple gate insulating films of varying thicknesses is complex and costly, posing challenges in process difficulty and increased costs.

Innovation Solution

A single poly non-volatile memory device is designed with a sensing transistor, selection transistor, and capacitor structure, where the selection gate insulating film is thicker than the sensing gate insulating film, and the control gate insulating film is equal to or thicker than the sensing gate insulating film, formed using a nitrogen ion implantation process to simplify the manufacturing process and reduce costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple gate insulating films with different thicknesses are formed in NVM devices, then the device performance and functionality are improved, but the manufacturing complexity and costs increase significantly

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by forming different thicknesses of gate insulating films in different regions of the semiconductor substrate. Specifically, a first gate insulating film is formed in a first region and a second gate insulating film is formed in a second region, with each having different thicknesses tailored to the specific device requirements in that region. This allows optimization of device performance for different functions while avoiding the complexity of forming multiple gate insulating films across the entire substrate.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the semiconductor substrate into multiple regions (first region and second region) with different gate insulating film configurations. By dividing the substrate into separate regions, each region can have independently optimized gate insulating film thicknesses, simplifying the manufacturing process compared to forming multiple gate insulating films throughout the entire substrate.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple gate insulating films with different thicknesses are formed in NVM devices, then the device functionality is enhanced, but the manufacturing costs increase considerably

Engineering Contradiction:
Improvedevice functionalityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent implements local quality by providing different gate insulating film thicknesses only where needed in specific regions of the substrate. The first gate insulating film is formed in the first region and the second gate insulating film is formed in the second region, allowing functional differentiation without requiring multiple gate insulating films across the entire substrate, thereby reducing manufacturing costs.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent achieves multi-functionality by forming different types of transistors (first transistor and second transistor) with different gate insulating film thicknesses on the same semiconductor substrate. This allows a single substrate to support multiple device functions with different performance requirements, eliminating the need for separate substrates or complex multi-layer gate insulating film structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the manufacturing process, reduces costs, and improves the efficiency of write and erase operations while enhancing data retention and durability by adjusting the oxide film thickness through ion implantation, thereby addressing the complexity and cost issues of forming multiple gate insulating films.

Implementation Method 1

formed using a nitrogen ion implantation process to simplify the manufacturing process and reduce costs

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS11825650B2Single poly non-volatile memory device and manufacturing method thereof
Publication Date: 2023.11.21 SK KEYFOUNDRY INC
  • US11825650B2 patent drawing
  • US11825650B2 patent drawing
  • US11825650B2 patent drawing

AI summary

A single poly non-volatile memory device is provided. The single poly non-volatile memory device is formed in a semiconductor substrate, and includes a sensing transistor, a selection transistor, and a capacitor, wherein a thickness of a selection gate insulating film is formed to be thicker than a thickness of a sensing gate insulating film, wherein a thickness of a control gate insulating film of the capacitor is formed to be the same, or greater than, a thickness of the sensing gate insulating film, and wherein the sensing gate of the sensing transistor and the control gate of the capacitor are physically and electrically connected to each other.