Single-Port Memory Device Dual Command Access Control
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Solution Overview
Problem
Conventional single-port memory devices can only perform one command per clock cycle, limiting their ability to simultaneously read and write data, whereas dual-port memory devices are more complex and costly with a higher number of transistors.
Innovation Solution
A single-port memory device with a control module that generates multiple control signals based on a clock signal, read command, and write command, allowing for dual command access by enabling primary pre-charge and enable signals twice in one clock cycle, using a master circuit, read/write clock generating circuits, and a combination circuit to manage these signals effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a dual-port memory device is used to enable simultaneous read and write operations, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent merges the functionality of two separate access ports into a single access port by using a control module that generates multiple sets of control signals (first and second pre-charge signals, first and second enable signals) within one clock cycle. This allows the single-port memory device to achieve dual-port functionality for simultaneous read and write operations while maintaining a simpler physical structure.
Solution Approach 2:
The control module utilizes periodic clock cycles to generate multiple sets of control signals, where each clock cycle contains both the first pre-charge signal and enable signal for one operation, and the second pre-charge signal and enable signal for another operation. This periodic generation of control signals enables simultaneous read and write operations through a single access port.
2Productivity
If a dual-port memory device is used to enable simultaneous read and write operations, then productivity is improved, but the number of transistors increases
Solution Approach 1:
The patent combines the transistor resources of a dual-port memory device into a single-port configuration by using the same physical access port and associated transistor structures for both read and write operations. The control module orchestrates the timing of operations to avoid conflicts, eliminating the need for duplicate transistor structures required in dual-port devices.
Solution Approach 2:
The single access port and its associated transistor structures are designed to serve multiple functions - handling both read operations and write operations. The control module generates different control signal combinations to direct the same physical structures to perform different operations, reducing the overall transistor count while maintaining full functionality.
Data Source
AI summary
A memory device and a method thereof. The memory described includes a control module and a single-port memory array. The control circuit generates control signals according to a clock signal, a read command signal and a write command signal. The single-port memory array is accessed according to the control signals.