Single-Port SSD Access Layout for Dual-Controller Redundancy
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Solution Overview
Problem
Conventional storage systems using single-port SSDs face issues with performance degradation due to lack of redundant backup designs in distributors, leading to system vulnerability and increased costs, especially when one controller fails.
Innovation Solution
Implement a data access method using storage virtualization controllers and clock generation circuits integrated on the backplane to provide dedicated clock signals to single-port SSDs, allowing seamless switching between controllers without additional routing components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If single-port SSDs are used with a controller pair for cost-effectiveness, then system cost is reduced, but system reliability deteriorates due to lack of redundant backup designs in distributors
Solution Approach 1:
The patent divides the single port of the SSD into two half-ports (first half-port and second half-port), each independently connectable to different controllers. This segmentation allows the SSD to be accessed by either controller independently, providing redundancy without requiring dual-port SSDs, thus maintaining cost-effectiveness while improving reliability.
Solution Approach 2:
The patent changes the operational parameter of the SSD port from a single unified port to two separable half-ports with independent connectivity. This parameter change enables flexible controller assignment and failover capabilities, allowing the system to maintain reliability through controller redundancy while using cost-effective single-port SSDs.
2Reliability
If multiplexers and clock multiplexers are added to connect single-port SSDs to two controllers, then controller redundancy is achieved, but device complexity increases
Solution Approach 1:
The patent extracts the switching function from separate multiplexer components and integrates it directly into the SSD port structure itself. The SSD port is designed with built-in switching capability that allows direct connection to either controller without requiring external multiplexer devices, thereby reducing overall system complexity while maintaining controller redundancy.
Solution Approach 2:
The patent merges the functions of the SSD port, multiplexer, and clock multiplexer into a single integrated structure. The half-port switching capability is combined with the connection interface and clock signal routing, eliminating the need for separate multiplexer components and reducing device complexity while achieving controller redundancy.
3Device complexity
If dual-port SSDs are used to eliminate multiplexers, then device complexity is reduced, but system cost increases significantly
Solution Approach 1:
The patent segments the port functionality of the SSD into two independent half-ports, each capable of separate controller connections. This segmentation provides dual-port functionality at the protocol level while using a single physical port hardware, avoiding the cost of dual-port SSDs while achieving the same connectivity and redundancy benefits.
Solution Approach 2:
The patent creates a virtual copy of the port interface by dividing the single port into two half-ports that can be independently assigned to different controllers. This virtual port copying provides the functionality of dual-port SSDs without requiring expensive hardware dual-port implementations, thus reducing system cost while maintaining low device complexity.
Data Source
AI summary
The present invention discloses a data access method and a storage subsystem implementing the method. The storage subsystem includes two storage virtualization controllers (SVC 1, SVC 2), a backplane, a physical storage device (PSD), and a clock generation circuit. The clock generation circuit is mounted on the backplane and provides a dedicated clock signal to the PSD. The PSD has a single port, and the lanes of the single port are divided into two half portions, each of which is coupled to one of the two storage virtualization controllers (SVC 1, SVC 2). Therefore, the present invention eliminates the need for additional intermediate components to couple the single-port PSD to the two storage virtualization controllers (SVC 1, SVC 2). This leads to simplified wiring and reduced costs, and the PSD will not be affected by failures of the intermediate components, thereby enhancing the redundancy architecture of the storage subsystem.