Single-Queue TSN Packet Scheduling With Metadata-Based QoS

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Solution Overview

Problem

Existing packet processing systems for time-sensitive networking incur high manufacturing and development costs due to the need for multiple physical queues and complex hardware algorithms to ensure various quality of service (QoS) levels.

Innovation Solution

A packet processing system utilizing a single queue with metadata-based scheduling and policing algorithms implemented in software, reducing hardware complexity and costs while ensuring QoS through transmission and reception metadata.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple physical queues are used to ensure different QoS levels, then QoS guarantee capability is improved, but hardware manufacturing cost and device complexity increase

Engineering Contradiction:
ImproveQoS guarantee capabilityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments QoS handling into two parts: a single shared physical queue for all packets, and separate virtual queues implemented as software data structures in the buffer memory. This allows multiple QoS levels to be maintained through logical segmentation rather than physical queue multiplication, reducing hardware complexity while preserving QoS differentiation capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a queue management module as an intermediary layer between the network interface and the processing core. This module handles queue selection, packet enqueueing, and dequeueing operations based on QoS levels, acting as a mediator that enables complex QoS behavior through software logic rather than hardware complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple physical queues are constructed with hardware, then various QoS levels are ensured, but manufacturing cost increases

Engineering Contradiction:
ImproveQoS level assuranceVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent creates virtual copies of queues in software (buffer memory regions) instead of manufacturing multiple physical hardware queues. Each QoS level has its own buffer region, but all share the same physical queue infrastructure, significantly reducing manufacturing costs while maintaining the ability to handle multiple QoS levels simultaneously.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The single physical queue structure is designed to serve multiple QoS levels universally. The queue management module directs packets to appropriate buffer regions based on QoS requirements, making the single physical queue infrastructure multi-functional and capable of handling diverse QoS levels without requiring separate hardware for each level.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If hardware algorithms are designed for various QoS types, then QoS processing capability is improved, but development cost increases

Engineering Contradiction:
ImproveQoS processing capabilityVSAvoiddevelopment cost
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent replaces hardware-based QoS algorithms with software-based implementations in the queue management module. The buffer memory regions, enqueueing logic, and dequeueing policies are all implemented in software rather than hardwired hardware circuits, allowing flexible QoS processing capability while significantly reducing development costs and complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements dynamic QoS handling through software that can adapt to different QoS requirements without hardware reconfiguration. The queue management module can dynamically select buffer regions, adjust queue priorities, and modify processing policies based on real-time QoS needs, providing versatile QoS processing capability through software flexibility rather than fixed hardware configurations.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250365240A1Packet processing system and packet processing method for time sensitive networking using a single queue
Publication Date: 2025.11.27 TSN LAB INC
  • US20250365240A1 patent drawing
  • US20250365240A1 patent drawing
  • US20250365240A1 patent drawing

AI summary

An embodiment provides a packet processing system including a network device that transmits and receives a plurality of packets through a network and a computing device that processes the plurality of packets. The computing device generates a plurality of pieces of transmission metadata related to a quality of service (QoS) of the plurality of packets, adds the plurality of pieces of generated transmission metadata to the plurality of packets, and transmits the plurality of packets to which the plurality of pieces of transmission metadata are added to the network device. The network device transmits the plurality of packets through the network according to a transmission order determined based on the plurality of pieces of transmission metadata.