Single-Slope ADC Gain Switching for High-Illuminance Image Sensors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional analog-to-digital conversion in solid-state imaging elements becomes slow at higher illuminance levels due to increased pixel signal levels, leading to reduced AD conversion speed.
Innovation Solution
The implementation of an attenuation unit in the ADC circuit that attenuates the pixel signal when it exceeds a threshold, reducing the time required for comparison and thereby increasing the AD conversion speed, using a configuration with capacitances and a selector to adjust the gain and connect the signal appropriately.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-slope ADC with comparison device and counter is used for AD conversion, then the configuration remains simple, but the AD conversion speed becomes slow when pixel signal level increases due to higher illuminance
Solution Approach 1:
The patent applies dynamic gain switching by changing the gain of the pixel signal path based on signal level conditions. When the pixel signal level exceeds a threshold, a different gain path is selected to reduce the effective signal level fed to the comparator, thereby reducing the comparison time and improving conversion speed while maintaining the basic single-slope ADC structure
Solution Approach 2:
The patent changes the gain parameter of the pixel signal path dynamically based on the signal level. By switching between different gain values (e.g., gain=1 and gain<1), the effective input range to the comparator is adjusted, allowing faster conversion for high signal levels while preserving the simple ADC architecture
2Reliability
If the pixel signal level increases due to higher illuminance, then the signal strength increases, but the time until comparison result inversion becomes long and AD conversion speed decreases
Solution Approach 1:
The patent dynamically adjusts the gain applied to the pixel signal based on its level. For high signal levels that would cause long comparison times, a reduced gain is applied to bring the signal into an optimal range for the comparator, thereby reducing conversion time while still accurately representing the original signal through subsequent digital scaling
Solution Approach 2:
The patent preemptively reduces the gain for high-level pixel signals before they enter the comparison stage. This preliminary action prevents the comparison time from becoming excessively long by ensuring the signal is appropriately scaled before the conversion process begins, thus avoiding time loss without compromising measurement accuracy
Data Source
Figure 1
Figure 2
Figure 3
AI summary
In a digital signal processing circuit that performs AD conversion using a comparison device and a counter, the speed of the AD conversion is increased. An attenuation unit, in a case where the level of an input signal exceeds a predetermined threshold value, attenuates the input signal and outputs it as an output signal. The comparison device compares the output signal with a predetermined reference signal that changes with lapse of time, and outputs the comparison result. The counter counts a count value until the comparison result is inverted and outputs a digital signal indicating the count value. The digital signal processing unit performs multiplication processing on the digital signal.