Single-Stage Gate Driving Circuit for High-Resolution Displays
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing gate driving circuits for display devices, particularly in high-resolution and large-sized panels, face challenges in reducing transistor count to minimize layout area and manufacturing costs while ensuring high reliability and performance under extreme temperatures, especially with the low carrier mobility of a-Si TFTs.
Innovation Solution
A single-stage gate driving circuit with multiple outputs is designed, incorporating bootstrapping, pre-charge, and output control circuits, along with anti-noise and negative bias compensation circuits, to efficiently manage voltage levels and reduce current leakage across multiple stages, enhancing driving capability and reliability across varying temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the number of transistors is reduced to save layout area, then the layout area is reduced, but the driving capability and reliability under extreme temperatures deteriorate
Solution Approach 1:
The patent merges multiple circuit functions (bootstrapping, pre-charge, output control, anti-noise, and negative bias compensation) into a single-stage gate driving circuit with multiple outputs. This integration reduces the overall transistor count and layout area while maintaining reliable operation under extreme temperatures through coordinated operation of the merged circuits
Solution Approach 2:
The single-stage gate driving circuit is designed to perform multiple functions simultaneously - bootstrapping to generate high voltage, pre-charging to prepare nodes, controlling output signals, providing anti-noise protection, and compensating for negative bias effects. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby reducing total transistor count while ensuring reliable operation across temperature extremes
2Measurement precision
If the number of frames is fixed for high-resolution panels, then the resolution is improved, but the operation time per scan line is reduced
Solution Approach 1:
The pre-charge circuits are designed to prepare the output nodes in advance by charging them to the required voltage levels before the actual scanning operation begins. This preliminary action ensures that when the scan line operation starts, the nodes are already primed and ready, compensating for the reduced operation time available per scan line in high-resolution displays
3Ease of manufacture
If a-Si TFTs are used to reduce production cost and simplify manufacturing, then the manufacturing cost is reduced and processes are simplified, but the carrier mobility is low leading to insufficient driving capability
Solution Approach 1:
The bootstrapping circuit generates a high voltage (higher than the standard operating voltage) to compensate for the low carrier mobility of a-Si TFTs. By changing the voltage parameter dynamically during operation, the circuit achieves sufficient driving capability while maintaining the manufacturing advantages of a-Si TFT technology
Solution Approach 2:
The negative bias compensation circuit acts as an intermediary that counteracts the threshold voltage shifts and mobility degradation effects in a-Si TFTs. This intermediary circuit compensates for the inherent limitations of a-Si material, enabling reliable operation while preserving the cost and manufacturing simplicity advantages
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit effectively improves current driving capability, reduces layout area, and extends the lifespan of transistors, enabling reliable operation in extreme temperature environments and meeting the requirements for high-resolution and narrow-bezel display devices.
Implementation Method 1
The first pre-charge circuit precharges a first node to a first voltage during a first duration
Implementation Method 2
The first bootstrapping circuit boosts the first node from the first voltage to a second voltage during a second duration
Implementation Method 3
The first output control circuit boosts the first node from the second voltage to a third voltage during a third duration
Implementation Method 4
The second pre-charge circuit precharges a second node to a fourth voltage during the second duration
Implementation Method 5
The second bootstrapping circuit boosts the second node from the fourth voltage to a fifth voltage during the third duration
Implementation Method 6
The second output control circuit boosts the second node from the fifth voltage to a sixth voltage during a fourth duration
Data Source
AI summary
A single-stage gate driving circuit with multiple outputs includes a first bootstrapping circuit, a first pre-charge circuit, a first output control circuit, a second bootstrapping circuit, a second pre-charge circuit, and a second output control circuit. During a first duration, the first pre-charge circuit precharges a first node to a first voltage. During a second duration, the first bootstrapping circuit boosts the first node from the first voltage to a second voltage, and the second pre-charge circuit precharges a second node to a fourth voltage. During a third duration, the first output control circuit boosts the first node from the second voltage to a third voltage, and the second bootstrapping circuit boosts the second node from the fourth voltage to a fifth voltage. During a fourth duration, the second output control circuit boosts the second node from the fifth voltage to a sixth voltage.