Single Input Terminal Circuit for Three-State PMU Detection
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Solution Overview
Problem
Existing power management units (PMUs) in integrated circuits require multiple input terminals to detect and respond to switch states, increasing manufacturing costs and power consumption.
Innovation Solution
A single input terminal is used to configure an integrated circuit into three states (low impedance, medium impedance, or floating) by a circuit that asserts digital logic signals based on the terminal's state, reducing the number of terminals and prioritizing switch states while maintaining low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple input terminals are used to detect switch states, then the PMU can detect and respond to different switch configurations, but the manufacturing cost increases
Solution Approach 1:
The patent applies multi-functionality by enabling a single input terminal to perform multiple detection functions. The terminal can detect different switch states (first switch closed, second switch closed, both closed, neither closed) by measuring impedance to different voltage sources (VDD or GND), replacing the need for multiple dedicated input terminals while maintaining full switch state detection capability
Solution Approach 2:
The patent changes the measurement parameter from simple voltage level detection to impedance-based detection. By measuring the impedance between the single terminal and different voltage sources, the system can distinguish between different switch configurations, enabling multiple detection functions through parameter variation rather than requiring multiple physical terminals
2Adaptability or versatility
If multiple input terminals are used to detect switch states, then the PMU can respond to different configurations, but the power consumption increases
Solution Approach 1:
The single input terminal serves multiple detection purposes by sequentially or selectively measuring impedance to different voltage sources. This universal terminal replaces multiple active terminals, reducing the overall power consumption while maintaining the ability to detect all switch states through intelligent measurement selection
Solution Approach 2:
The patent implements periodic or selective measurement cycles where the PMU measures impedance to VDD or GND based on the detected state. After detecting a switch closure, further measurements can be skipped or performed less frequently, reducing power consumption while maintaining detection capability through periodic monitoring rather than continuous measurement
3Ease of manufacture
If a single input terminal is used to detect multiple switch states, then the number of terminals is reduced, but the circuit complexity increases
Solution Approach 1:
The patent manages circuit complexity by changing measurement parameters (impedance to different voltage sources) rather than adding complex hardware. The circuit uses controlled switches to connect the single terminal to different voltage sources sequentially, with a processor analyzing impedance values to determine switch states, keeping the physical circuit simple while achieving complex detection functionality through software-based analysis
4Adaptability or versatility
If impedance-based detection is used with a single terminal, then multiple switch states can be detected, but the measurement precision requirements increase
Solution Approach 1:
The patent improves measurement precision by changing the reference parameter - instead of measuring absolute impedance, the system measures impedance relative to known voltage sources (VDD or GND). This differential measurement approach with controlled voltage references reduces measurement errors and improves the precision of impedance-based switch state detection
Data Source
AI summary
A single terminal is used to configure an integrated circuit into one of three states. A circuit within the integrated circuit is coupled to the terminal and determines whether the terminal: 1) is coupled by a low impedance to a voltage source, or 2) is coupled by a medium impedance to the voltage source, or 3) is floating or substantially floating. The circuit asserts a first digital logic signal when the circuit determines that the terminal is coupled by the low impedance to the voltage source. The circuit asserts a second digital logic signal when the circuit determines that the terminal is coupled by the medium impedance to the voltage source. The circuit asserts a third digital logic signal when the circuit determines that the terminal is floating or substantially floating. The terminal and circuit are particular suited for use in a Power Management Unit (PMU) Integrated Circuit.


