Single-Wire Slave Driver Circuit With Boosted Bias Settling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing driver circuits for UICC slave devices in Single Wire Protocol (SWP) communication face challenges in meeting timing requirements while minimizing power consumption, particularly due to slow settling of bias node voltages caused by large capacitance and low current during transitions.
Innovation Solution
A driver circuit incorporating a current mirror with a boost current element that provides a temporary boost current to the bias node, reducing the settling time of voltage levels and enhancing mirror current stability without significant power increase, achieved through a control signal-driven current boosting mechanism.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a conventional driver circuit with current mirror is used, then power consumption is kept low, but the settling time of bias node voltage is too long to meet SWP timing requirements
Solution Approach 1:
The patent applies periodic action by using a boost transistor that is activated only during the transition period when the control signal changes state. The boost transistor provides enhanced current temporarily to charge or discharge the bias node capacitance, and then turns off once the voltage settles. This periodic activation reduces settling time without causing continuous power consumption increase.
Solution Approach 2:
The patent implements dynamics by making the current driving capability of the bias node time-variable. During normal operation, the circuit operates in a low-power steady state. During transitions, the boost transistor dynamically increases the available current to speed up voltage settling. This dynamic adaptation allows the circuit to meet timing requirements only when necessary.
2Loss of time
If the bias node capacitance is reduced, then settling time decreases, but the circuit cannot properly drive the current mirror transistors
Solution Approach 1:
The patent applies preliminary action by providing the boost current exactly when needed - at the moment of control signal transition. The boost transistor is activated in advance of the actual current mirror operation to ensure the bias node voltage has already settled before the current mirror transistors need to respond. This preliminary voltage establishment ensures reliable current mirror operation without requiring reduced capacitance.
Data Source
Figure 1~2
Figure 3
Figure 4a~4b
AI summary
There is described a driver circuit for a single wire protocol slave unit, the driver circuit comprising (a) at least one current mirror comprising a first transistor (MP1, MN3) and a second transistor (MP2, MN4), wherein the gate of both transistors is connected to a bias node (PBIAS, S2BIAS), and wherein the second transistor is adapted to conduct a mirror current (I2, IOUT) equal to a current (I1, I2) conducted by the first transistor multiplied by a predetermined factor, (b) a bias transistor (MP3, MN5) for selectively connecting and disconnecting the bias node to and from a predetermined potential (VDD, GND) in response to a control signal (ABUF, AN), and (c) a current boosting element for providing a boost current (I1P, I2P) to the bias node for a predetermined period of time when the control signal causes the bias transistor to disconnect the bias node from the predetermined potential. There is also described a universal integrated circuit card device comprising a driver circuit.