Single Wire Digital Bus Auto-Addressing for Sensor Networks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In complex electronic systems, such as those in automobiles, the use of parallel bus interfaces for sensor interconnection leads to increased PCB complexity and costs due to the need for dedicated chip select pins or unique addresses for each sensor, which is costly and inefficient, especially when using wired connections.
Innovation Solution
A self-addressing scheme for devices on a single wire digital bus, where devices arbitrate for unique addresses by transmitting device-specific data upon request, allowing multiple devices to organize and receive individual addresses without pre-stored addresses, using either digital or analog signals to communicate addresses without conflicts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parallel bus interfaces are used for sensor interconnection, then communication reliability is improved, but PCB complexity and wiring costs increase significantly
Solution Approach 1:
Multiple parallel bus interfaces are merged into a single wire digital bus, where multiple sensor devices share one communication line through time-division multiplexing with auto-addressing, reducing PCB trace count and wiring complexity while maintaining reliable communication
Solution Approach 2:
The single wire bus serves multiple functions: it provides both clock and data transmission, and enables auto-addressing without dedicated chip select pins, making the system more versatile and reducing overall complexity
2Reliability
If dedicated chip select pins are assigned to each slave device, then address uniqueness is ensured, but the number of IO pins required on the master controller increases
Solution Approach 1:
Slave devices automatically generate and transmit their own addresses on the single wire bus without requiring the master controller to provide dedicated chip select pins, enabling address uniqueness while keeping the master controller's IO pin count low
Solution Approach 2:
The mechanical/electrical connection of dedicated chip select pins is replaced by a digital communication protocol where addresses are transmitted as data signals over the shared bus, eliminating the need for additional physical connections
3Reliability
If addresses are assigned during production, then unique addressing is achieved, but database maintenance complexity and device area increase
Solution Approach 1:
Devices automatically generate their own addresses using local entropy sources during runtime rather than having addresses pre-assigned during production, eliminating the need for external database maintenance and reducing device area requirements for address storage
4Productivity
If multiple devices transmit addresses simultaneously on the digital bus, then address generation speed is improved, but signal conflicts occur
Solution Approach 1:
Devices transmit their addresses in periodic time slots on the single wire bus, with each device assigned a specific transmission window, enabling simultaneous address generation across multiple devices while preventing signal conflicts through time-division multiplexing
Data Source
AI summary
A device for a single wire digital bus, includes an interface for the bus configured to receive a request to arbitrate for an address and to transmit device specific data on the bus upon receipt of the request to arbitrate for an address The device further includes a control circuit configured to determine, if a further device transmits device specific data on the bus, and to use the address arbitrated for, if no further device transmits device specific data on the bus.