Single-Wire Bus Multi-Channel Signaling Without Higher Clock Frequency
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Solution Overview
Problem
Current single-wire protocols are limited in transmitting data to multiple slave circuits simultaneously and have a restricted transmission rate, which cannot be increased without elevating the clock frequency.
Innovation Solution
Implementing a method that utilizes a single-wire bus with multiple channels, where one channel modulates pulse width between two voltage levels, and another modulates amplitude between these levels, enabling simultaneous communication with multiple slave devices without increasing clock frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single-wire protocol transmits data to multiple slave circuits simultaneously, then the communication capability is improved, but the transmission rate is restricted and cannot be increased without raising the clock frequency
Solution Approach 1:
The patent segments the single communication channel into multiple independent channels by dividing the voltage level range into distinct zones. Each channel operates within its own voltage range (e.g., first channel uses V0-V1, second channel uses V1-V2), allowing simultaneous transmission of multiple data streams over the same wire without interference, thereby improving communication capability while maintaining the original transmission rate
Solution Approach 2:
The patent transitions from single-dimension modulation (single voltage level variation) to multi-dimension modulation by utilizing multiple voltage levels (V0, V1, V2, etc.) and assigning different channels to different voltage ranges. This dimensional expansion in the voltage domain enables multiple slave circuits to be addressed simultaneously without increasing the clock frequency, resolving the contradiction between communication capability and transmission rate
2Productivity
If the clock frequency is increased to improve transmission rate, then the productivity is improved, but the device complexity and power consumption increase
Solution Approach 1:
Instead of changing the clock frequency parameter to increase transmission rate, the patent changes the voltage level parameter by introducing multiple voltage levels (V0, V1, V2, etc.) and using them to create multiple communication channels. This parameter substitution allows the system to achieve higher effective transmission capacity without increasing clock frequency, thereby avoiding the associated increases in device complexity and power consumption
3Ease of operation
If a single-wire bus transmits power supply, clock, and data signal simultaneously, then the ease of operation is improved, but the transmission rate is limited
Solution Approach 1:
The patent segments the signal transmission function by creating multiple independent data channels within the single-wire bus. Each channel can be independently controlled and modulated at different voltage levels, allowing the system to maintain the simplicity of single-wire operation while achieving higher effective transmission rates through parallel data streams
Solution Approach 2:
The single-wire bus is designed to perform multiple functions simultaneously: power supply, clock signaling, and multi-channel data transmission. By utilizing different voltage level ranges for different data channels, the system achieves multi-functionality without requiring separate wires for each function, thereby maintaining ease of operation while improving transmission rate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for simultaneous communication with multiple slave devices and doubles the communication rate, while maintaining bidirectional transmission capabilities and adaptability to different voltage levels, supporting various applications.
Implementation Method 1
a first transmission channel from the master device to the slave device modulates the width of periodic pulses between a first voltage level and a second voltage level of same sign with respect to a reference potential; and a second transmission channel modulates the amplitude of at least one of the voltage levels between this level and at least one third level different from the other two and from the reference potential
Data Source
AI summary
A method for transmitting at least a synchronization and a data signal on a single-wire bus between a master device and at least one slave device, wherein a first transmission channel from the master device to the slave device modulates the periodic pulse width between a first level and second level of a same sign voltage relative to a reference potential, and a second transmission channel amplitude modulates at least one of the voltage levels between the level and at least one third level different from the two others and from the reference potential.