Single-Wire Power Interface Using PMOS Full-Voltage Charging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In single-wire interface systems, the recharge voltage level achieved during non-communication periods is at one diode forward bias voltage drop below the power supply voltage, which may not be sufficient for proper operation of target device functions, especially in low voltage systems.

Innovation Solution

A single-wire interface system that uses a PMOS transistor as a switch to couple a charge storage device to the interface, allowing full charging of the connection point to the power supply voltage level during non-communication time periods, with an inverter controlling the PMOS transistor to maintain the power supply voltage level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a diode is used to charge the capacitor during non-communication periods, then the circuit is simple, but the recharge voltage level is at one diode forward bias voltage drop below the power supply voltage, which is insufficient for proper operation

Engineering Contradiction:
Improvecircuit complexityVSAvoidpower supply sufficiency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a PMOS transistor as an intermediary component between the power supply and the capacitor. This transistor acts as a controlled switch that can fully charge the capacitor to the power supply voltage level during non-communication periods, eliminating the voltage drop issue associated with diodes while maintaining circuit simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the electrical parameter (voltage level) by using a PMOS transistor that can operate at full power supply voltage, rather than being limited to diode forward bias voltage drop. This parameter change enables the capacitor to reach the full power supply voltage, ensuring sufficient power for target device functions.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the capacitor is charged during non-communication periods, then power is available for target device functions, but the charging time must be sufficient to replenish all charge depleted during communication

Engineering Contradiction:
Improvepower availabilityVSAvoidcharging time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent ensures continuous power availability by maintaining the charging mechanism during all non-communication periods. The PMOS transistor remains controlled to charge the capacitor continuously whenever the bus is not in use, ensuring that the capacitor is fully recharged before the next communication period begins, thus eliminating power interruptions.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary charging action during non-communication periods before the next communication transaction starts. The capacitor is charged in advance using the PMOS transistor, ensuring that sufficient power is available at the start of communication without waiting until the last moment, thereby optimizing the timing of power delivery.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If a PMOS transistor is used to couple the charge storage device to the interface, then full charging to power supply voltage is achieved, but the device complexity increases

Engineering Contradiction:
Improvevoltage level sufficiencyVSAvoidtransistor control circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a PMOS transistor as an intermediary switch that is controlled by the existing bus signal logic. The transistor is controlled by an inverter that responds to the bus state, allowing the PMOS to automatically charge the capacitor during non-communication periods without requiring complex external control circuitry. This approach achieves full voltage charging while minimizing added complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent makes the PMOS transistor and its control inverter serve multiple functions: they act as both power switching elements and part of the existing bus protocol implementation. The same circuitry that controls communication also manages power charging, eliminating the need for separate dedicated power control circuits and thereby reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Ensures that the target device receives a full power-supply voltage level during non-communication periods, preventing voltage drop and ensuring sufficient power for target device functions.

Implementation Method 1

A PMOS transistor is used as a switch to couple a charge storage device to the single-wire interface, allowing full charging of the connection point to the power supply voltage level

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Implementation Method 2

a charge storage device coupled to a drain of the PMOS transistor at a connection point, a device function coupled to the charge storage device at the connection point to receive stored power therefrom

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7782240B2Device and method of supplying power to targets on single-wire interface
Publication Date: 2010.08.24 ATMEL CORP
  • US7782240B2 patent drawing
  • US7782240B2 patent drawing
  • US7782240B2 patent drawing

AI summary

A single-wire interface communication system is capable of providing both electrical communication of signals and power between devices coupled to the system. Coupled to the single-wire interface is at least one target device which contains a PMOS transistor, a charge storage device, an inverter controlling the PMOS transistor, and a target device function. The charge storage device provides power to the target device function and to the inverter. The PMOS transistor receives power from the single-wire interface at a power-supply voltage level and charges the charge storage device to the same level. Non-communication periods produce a charging period sufficient for the charge storage device to attain the power-supply voltage level.