Singular Wire Bond on Bonding Pads for Semiconductor Packages
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Solution Overview
Problem
Existing semiconductor packages with passive wire carriers increase manufacturing costs and z-height, leading to higher defects and reduced yields, as interconnect wires must be attached to a common bonding area, limiting their applicability in thin form factor applications.
Innovation Solution
A semiconductor package design that eliminates the passive wire carrier by directly bridging interconnect wires between adjacent die stacks, forming singular vertical wire bonds on bonding pads, reducing mechanical stress and manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a passive wire carrier is used to attach interconnect wires to a common bonding area, then the interconnect wires can be properly connected, but the z-height increases and manufacturing costs increase
Solution Approach 1:
The patent removes the passive wire carrier from the package structure, extracting the common bonding area requirement. Interconnect wires are now attached directly to bonding pads on adjacent die stacks, eliminating the need for a separate wire carrier component and reducing z-height.
Solution Approach 2:
The common bonding area is segmented into individual bonding pads on separate die stacks. Instead of all wires connecting to a single common area on one die, wires from different die stacks connect to their respective bonding pads, distributing the bonding function across multiple components.
2Reliability
If a passive wire carrier is used to attach interconnect wires, then connections can be established, but manufacturing defects increase and yields decrease
Solution Approach 1:
By removing the passive wire carrier and common bonding area requirement, the patent eliminates the complex multi-step bonding process that caused defects. The simplified direct-attach method reduces manufacturing steps and improves yield.
3Reliability
If a common bonding area is required for interconnect wires, then proper electrical connection is achieved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts the common bonding area requirement, allowing each interconnect wire to be independently attached to bonding pads on adjacent die stacks. This eliminates the need for a shared bonding region and simplifies the overall package structure.
Solution Approach 2:
Instead of having wires converge on a common bonding area (centralized approach), the patent inverts the approach by having bonding pads distributed across multiple die stacks (distributed approach), with wires connecting directly between adjacent stacks.
4Reliability
If a passive wire carrier is used, then interconnect wires can be supported, but the package thickness increases reducing suitability for thin form factor applications
Solution Approach 1:
The passive wire carrier is completely removed from the package structure. Wire support function is transferred to the die stacks themselves through direct bonding pad attachments, eliminating the intermediate support structure that added thickness.
Data Source
AI summary
Semiconductor packages including active die stacks, and methods of fabricating such semiconductor packages, are described. In an example, a semiconductor package includes an active die having a top surface covered by a molding compound, and a bonding pad attached to only one interconnect wire. A method of fabricating the semiconductor package includes bridging a pair of dies stacks by the interconnect wire, and dividing the interconnect wire to form separate wire segments attached to respective die stacks.