Sinter-Bonding Sheet Lamination for Semiconductor Chip Material Loss Reduction
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Solution Overview
Problem
The existing die bonding techniques for semiconductor devices using sinter-bonding materials result in significant loss of material due to the large clearance between chips during the lamination and transfer process, leading to inefficient supply and bonding.
Innovation Solution
A semiconductor device manufacturing method that involves dicing, lamination, picking-up, temporary securing, and sinter bonding steps, where a sinter-bonding sheet with conductive metal-containing sinterable particles is laminated onto a diced semiconductor wafer with reduced chip spacing, allowing for efficient transfer and bonding of the material to each chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a sheet including a sinter-bonding material layer is laminated onto semiconductor chips arrayed on a processing tape with large clearance between chips, then the sinter-bonding material can be supplied to multiple chips by batch, but significant loss of sinter-bonding material occurs due to the large clearance
Solution Approach 1:
The invention segments the sinter-bonding material supply process by using individual sheets for each chip instead of a single large sheet covering multiple chips. Each sheet is precisely sized to match the chip dimensions, allowing batch processing while eliminating material loss in clearance areas. The sheets are sequentially applied to each chip in the array, maintaining productivity while improving material efficiency.
2Reliability
If semiconductor chips are arranged with sufficient separation distance to avoid contact during arrangement, then chip damage is prevented, but the clearance causes increased sinter-bonding material loss during lamination
Solution Approach 1:
The invention applies local quality by tailoring the size and shape of each sinter-bonding material sheet to precisely match the dimensions of the individual chip it will bond to. This localized approach ensures material is only applied where needed on each chip, eliminating waste in the clearance regions between chips while maintaining the necessary separation distance for chip integrity during handling and arrangement.
3Productivity
If a large sheet is used to supply sinter-bonding material to multiple chips at once, then batch processing efficiency is improved, but material transfer efficiency decreases due to portions not being transferred to chips
Solution Approach 1:
The invention employs a dynamic approach where the sinter-bonding material supply is adapted to match the specific configuration of chips on the processing tape. Rather than using a static large sheet that covers all chips uniformly, individually sized sheets are applied dynamically to each chip's actual position and dimensions, optimizing both batch processing efficiency and material transfer efficiency by eliminating unused material portions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces material loss and ensures efficient batchwise supply of sinter-bonding material to each semiconductor chip, enhancing the bonding reliability and thermal shock resistance of the sintered layers.
Implementation Method 1
a heating process operates under predetermined temperature-pressurization conditions so that the solvent in the sinter-bonding material undergoes, for example, volatilization and the sintering proceeds between the sinterable particles
Implementation Method 2
the solvent in the sinter-bonding material undergoes, for example, volatilization and the sintering proceeds between the sinterable particles
Data Source
AI summary
A manufacturing method includes the step of forming a diced semiconductor wafer (10) including semiconductor chips (11) from a semiconductor wafer (W) typically on a dicing tape (T1). The diced semiconductor wafer (10) on the dicing tape (T1) is laminated with a sinter-bonding sheet (20). The semiconductor chips (11) each with a sinter-bonding material layer (21) derived from the sinter-bonding sheet (20) are picked up typically from the dicing tape (T1). The semiconductor chips (11) each with the sinter-bonding material layer are temporarily secured through the sinter-bonding material layer (21) to a substrate. Through a heating process, sintered layers are formed from the sinter-bonding material layers (21) lying between the temporarily secured semiconductor chips (11) and the substrate, to bond the semiconductor chips (11) to the substrate. The semiconductor device manufacturing method is suitable for efficiently supplying a sinter-bonding material to individual semiconductor chips while reducing loss of the sinter-bonding material.