Sintered Power Module Package With Kelvin Contact Layout
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power module designs for wide bandgap semiconductor devices face manufacturing complexity, high thermal and electrical resistance, and reduced switching performance due to multiple interconnect technologies like wire bonds and clip bonding, which limit the efficiency and reliability of SiC and GaN power modules.
Innovation Solution
A power module package design featuring a substrate with insulated traces and semiconductor dies attached using metallic particle sintering, eliminating wire bonds and incorporating a Kelvin probe for improved mechanical and vibrational robustness, with a source down die-attach and drain clip-attach configuration to reduce ohmic resistance and parasitic inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonds and clip bonding are used to connect semiconductor dies, then electrical connections can be established, but manufacturing complexity increases and thermal/electrical resistance increases
Solution Approach 1:
The patent merges multiple interconnection functions into a single integrated substrate structure. The substrate includes multiple conductive traces (first trace, second trace, third trace) that simultaneously provide electrical connections for source, gate, and drain electrodes, eliminating the need for separate wire bonds and clip bonds. This integration reduces manufacturing complexity while maintaining reliable electrical connections.
Solution Approach 2:
The patent extracts and eliminates the wire bond interconnection technology from the module design. By using direct trace connections on the substrate, the complex wire bonding process and associated tooling requirements are removed, simplifying manufacturing while reducing parasitic inductance and improving electrical performance.
2Reliability
If wire bonds are used for connecting electrodes, then electrical connections can be made, but parasitic inductance increases and switching performance decreases
Solution Approach 1:
The patent removes wire bonds from the interconnection system, replacing them with direct substrate traces. This extraction eliminates the loop areas and long connection paths that generate parasitic inductance, thereby improving switching performance while maintaining reliable electrical connections.
Solution Approach 2:
The patent transitions from three-dimensional wire bond connections to planar two-dimensional trace connections on the substrate. This dimensional change reduces the loop area and connection length, minimizing parasitic inductance while providing robust electrical connections for all electrodes.
3Reliability
If multiple interconnect technologies are combined, then comprehensive electrical connections can be achieved, but process control difficulty increases and yield decreases
Solution Approach 1:
The patent combines multiple interconnection functions into a single substrate manufacturing process. All electrical connections (source, gate, drain) are established through traces formed during substrate fabrication, eliminating the need for multiple separate bonding processes. This unified approach simplifies process control and improves manufacturing yield.
4Reliability
If long wire bond connections are used, then electrode connections can be established, but thermal resistance increases and heat removal efficiency decreases
Solution Approach 1:
The patent replaces long three-dimensional wire bond paths with short planar traces on the substrate. This dimensional change significantly reduces the length and thermal resistance of electrical connections, improving heat removal efficiency while maintaining reliable electrode connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces manufacturing complexity, lowers ohmic resistance, enhances switching performance, and improves thermal impedance, leading to increased product efficiency and longevity by eliminating wire bonds and top metallic resistance, allowing for smaller die sizes and reduced parasitic package inductance.
Implementation Method 1
attaching includes: causing the first surface of each semiconductor die to face the substrate, and connecting the first electrode pad to the first trace, and connecting the control electrode pad to the second trace
Data Source
Figure 1A~2B
Figure 2~3B
Figure 4~5
AI summary
The present invention provides a power module package and manufacture method thereof. The power module package includes: a substrate, a first trace and a second trace insulated from each other on the substrate, and at least one semiconductor die. Each semiconductor die includes a first electrode pad, a second electrode pad and a control electrode pad. The first electrode pad and the control electrode pad are on a first surface of the semiconductor die facing the substrate, and the second electrode pad is on a second surface of the semiconductor die facing away from the substrate. The first electrode pad is connected to the first trace, and the control electrode pad is connected to the second trace. The power module package further includes a first electrode contact directly connected to the first trace, a second electrode contact directly connected to the second electrode pad of each semiconductor die from a side of the at least one semiconductor die away from the substrate, and a control electrode contact directly connected to the second trace.