Power Semiconductor Sintered Contacting for Low-Inductance Switching

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Solution Overview

Problem

Existing power semiconductor contacting methods limit maximum current density and switching speed due to parasitic inductances from bonding wires and close proximity to substrates, which affects switching behavior and reliability.

Innovation Solution

A method involving a structured metal connecting layer with at least two substantially closed sintered layers applied using templates, where the power semiconductor's contact areas are connected to the substrate through sintering, maintaining electrical isolation and achieving high conductivity and current carrying capacity, with a distance from the substrate to minimize electromagnetic interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If bonding wires are used to contact power semiconductors, then electrical connection is established, but parasitic inductances are generated which limit maximum switching speed

Engineering Contradiction:
Improveswitching speedVSAvoidparasitic inductances
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The invention extracts and eliminates the bonding wire from the system by implementing direct contact between the power semiconductor component and the circuit carrier through a contact structure integrated into the substrate. This removes the source of parasitic inductances and enables higher switching speeds.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention introduces a metal mold and contact structure as an intermediary element that provides direct electrical connection between the power semiconductor and circuit carrier, replacing the bonding wire function while eliminating its harmful parasitic effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If bonding wires are used to contact power semiconductors, then electrical connection is established, but maximum current density is limited

Engineering Contradiction:
Improvecurrent densityVSAvoidbonding wire limitations
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The invention removes the bonding wire constraint by implementing direct contact through an integrated contact structure, enabling higher current density to be achieved without the limitations of wire bonding technology.

Inventive Principle:
Principle #2Taking out (Extraction)

3Stability of the object's composition

If power semiconductor is placed close to substrate, then mechanical stability is improved, but electromagnetic interference and parasitic effects increase

Engineering Contradiction:
Improvemechanical stabilityVSAvoidelectromagnetic interference
Core Design Contradiction:
Stability of the object's compositionVSObject-affected harmful factors

Solution Approach 1:

The invention applies local quality by creating a raised contact structure that provides mechanical stability at the contact point while maintaining electromagnetic isolation. The contact structure is positioned to achieve both mechanical support and electrical isolation from the substrate plane.

Inventive Principle:
Principle #3Local quality

4Ease of manufacture

If traditional wire bonding is used, then manufacturing process is simple, but device complexity increases due to parasitic effects

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidparasitic effects
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The invention merges the electrical connection function and mechanical support function into a single integrated contact structure formed during substrate fabrication. This eliminates the separate bonding wire step while removing parasitic effects, simplifying the overall device structure.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances switching behavior and increases maximum current density while maintaining isolation, leading to improved reliability and longer service life by avoiding parasitic inductances and electromagnetic interactions.

Implementation Method 1

a first sintered layer is applied to the substrate and is at least partially dried, wherein at least one second sintered layer is applied to the first sintered layer and is at least partially dried, wherein the at least two contact areas of the power semiconductor which are electrically isolated from one another are contacted on the second sintered layer, in particular by means of pressing and are thereupon connected with a material bond to the substrate by sintering the at least two sintered layers

Methodology Applied
Scientific EffectSintering: Sintering

Data Source

PatentUS20230343745A1Method for contacting a power semiconductor on a substrate
Publication Date: 2023.10.26 SIEMENS AG
  • US20230343745A1 patent drawing
  • US20230343745A1 patent drawing
  • US20230343745A1 patent drawing

AI summary

A method for contacting a power semiconductor device on a substrate is disclosed. In order to achieve improved switching behavior and a higher maximum current density, the power semiconductor device has, on a side facing the substrate, at least two contact regions which are electrically isolated from one another, and which are connected by a material bond to the substrate by a structured, in particular metal, connecting layer which includes at least two sintered layers.