Sintering Bond Sheet for Semiconductor Chips
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Solution Overview
Problem
Conventional sintering bonding techniques for semiconductor devices face inefficiencies in applying a sinterable particle containing composition, leading to issues like material protrusion and wraparound, which can cause damage and short circuits during the sintering process, especially when using high-temperature semiconductor materials like SiC or GaN.
Innovation Solution
A sheet for sintering bonding comprising an electrically conductive metal containing sinterable particles and a binder component, with a specific area ratio of the material layer to the chip plane, is used to prevent material protrusion and ensure strong bonding, employing a pressurization treatment under controlled temperature and load conditions to achieve a shear bonding strength of 50 MPa or more.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sinterable particle containing composition is applied to every semiconductor chip individually, then the bonding reliability is improved, but the production efficiency deteriorates
Solution Approach 1:
The sheet for sintering bonding is divided into multiple regions corresponding to each semiconductor chip position. Each region contains sinterable particles that will be transferred to the respective chip, enabling individualized application while maintaining collective processing efficiency
Solution Approach 2:
The sinterable particles are pre-applied to the sheet in a controlled pattern before the semiconductor chips are placed. This preliminary application ensures precise material placement and eliminates the need for individual application to each chip, thereby improving production efficiency while maintaining bonding reliability
2Productivity
If a sheet for sintering bonding is pressed against semiconductor chip array and then separated, then the material supply efficiency is improved, but material protrusion and wraparound occur causing damage and short circuits
Solution Approach 1:
The sheet for sintering bonding has different properties in different regions: the central region containing sinterable particles has controlled adhesion characteristics, while the peripheral regions have reduced adhesion. This local differentiation ensures that material is transferred only where needed (to the chip areas) and prevents protrusion and wraparound at the edges
Solution Approach 2:
The sheet design incorporates peripheral regions with reduced adhesion properties that act in advance to prevent material protrusion and wraparound during the pressing and separation process. This preliminary anti-action counteracts the potential harmful effects before they can occur
3Strength
If the area ratio of material layer to chip plane is increased, then the bonding strength is improved, but material protrusion is more likely to occur
Solution Approach 1:
The sheet for sintering bonding implements spatial differentiation where the central region has high material density and adhesion for strong bonding, while the peripheral regions have reduced material presence. This local quality variation achieves high bonding strength at the chip contact areas without causing material protrusion
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents material protrusion and ensures high bonding strength, enhancing the yield of semiconductor devices by maintaining the integrity of the sintered layer and preventing short circuits, particularly suitable for high-temperature semiconductor materials.
Implementation Method 1
a heating step is carried out under predetermined temperature and pressurization conditions such that volatilization of the solvent and the like in the material for sintering bonding occurs between the supporting substrate and the semiconductor chip thereon, and sintering between sinterable particles proceeds
Implementation Method 2
when the sheet is subjected to a pressurization treatment onto a silver plane of a silicon chip with a size of 5 mm square having the silver plane forming a chip plane under conditions with a temperature of 70°C or 90°C, a load of 10 MPa, and a pressurization time of 5 seconds, the ratio of the area of a layer of a material for sintering bonding that is transferred onto the silver plane
Data Source
Figure 1~2
Figure 3(a)~3(c)
Figure 4~5
AI summary
A sheet for sintering bonding (10) comprises an electrically conductive metal containing sinterable particles and a binder component, wherein, upon subjecting the sheet (10) to a pressurization treatment onto a silver plane of a 5 mm square Si chip (C) under predetermined conditions, the ratio of the area of a layer of a material for sintering bonding (11) transferred onto the silver plane to the silver plane area is 0.75 to 1. The sheet for sintering bonding (10) may be such that, when the silver plane is sintering-bonded under sintering conditions with a heating temperature of 300°C, an applied pressure of 10 MPa, and a heating time of 150 seconds, a shear bonding strength at 23°C to the silver plane is 50 MPa or more or such that, when the silver plane is sintering-bonded under sintering conditions with a heating temperature of 300°C, an applied pressure of 40 MPa, and a heating time of 300 seconds, a shear bonding strength at 23°C to the silver plane is 50 MPa or more. A sheet body (X) has a laminated structure comprising a base material (B) and the sheet for sintering bonding (10). A semiconductor chip (C) with a layer of a material for sintering bonding (11) comprises a semiconductor chip (C) and a material layer (11) derived from the sheet (10) on one face of the chip (C), wherein the ratio of the area of the layer of the material for sintering bonding (11) to the area of that face of the chip (C) is 0.75 to 1. The sheet for sintering bonding (10) may be collectively transferred from the base material (B) to a plurality of chips (C) on a tape for processing (T1) by lamination and subsequent separation of the base material (B), wherein a small piece of the sheet for sintering bonding (10) is cut during the separation step so as to form the layer of the material for sintering bonding (11) on each chip (C).