SiOC(N) Hard Mask for Undercut Control in Porous Low-K Dielectric Etching
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Solution Overview
Problem
In semiconductor manufacturing, the use of low-K dielectric materials to reduce parasitic capacitances and resistances leads to substantial undercuts during etching processes, resulting in voids and unstable conductive structures, which affect the electrical properties of the conductive structures formed.
Innovation Solution
A method involving the use of a nitrogen-doped silicon oxycarbide (SiOC(N)) hard mask layer to form openings in a porous low-K dielectric layer, ensuring minimal undercut and stable adhesion, allowing for the formation of conductive structures with improved morphology and electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If low-K dielectric material is used to reduce parasitic capacitances, then the RC delay effect is reduced, but substantial undercuts are formed during etching processes
Solution Approach 1:
A buffer layer made of silicon oxynitride (SiON) is introduced between the low-K dielectric layer and the hard mask layer. This intermediary buffer layer modifies the etching characteristics at the interface, preventing the etchant from directly attacking the low-K material and thus reducing undercut formation while maintaining the electrical benefits of the low-K dielectric
Solution Approach 2:
The patent uses a composite structure consisting of multiple layers with different material properties: the low-K dielectric layer (porous material), the SiON buffer layer, and the hard mask layer (TEOS). This composite approach allows each layer to perform its specific function - the low-K layer reduces parasitic capacitance, the SiON layer controls etching, and the TEOS layer provides pattern definition
2Ease of manufacture
If conventional etching processes are used to form openings, then conductive structures can be formed, but voids are formed between conductive structures and sidewalls due to undercuts
Solution Approach 1:
The buffer layer is formed in advance before the etching process to pre-establish a protective interface. This preliminary action ensures that when the etching process occurs, the undercut is already mitigated, allowing conductive material to be deposited without forming voids and ensuring stable conductive structure formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach prevents undercuts and ensures complete coverage of conductive films, enhancing the stability and performance of the conductive structures by maintaining the desired morphology and adhesion, thus improving the electrical properties of the semiconductor structures.
Implementation Method 1
forming a first hard mask layer made of nitrogen-doped silicon oxycarbide (SiOC(N)) on the to-be-etched layer; and etching the first hard mask layer to have patterns corresponding to positions of subsequently formed openings. Further, the method includes forming the plurality of openings without substantial undercut between the to-be-etched layer and the first hard mask layer
Implementation Method 2
A method involving the use of a nitrogen-doped silicon oxycarbide (SiOC(N)) hard mask layer to form openings in a porous low-K dielectric layer, ensuring minimal undercut and stable adhesion
Data Source
AI summary
A method is provided for fabricating a semiconductor structure. The method includes providing a substrate; and forming a to-be-etched layer made of porous low dielectric constant material on one surface of the semiconductor substrate. The method also includes forming a first hard mask layer made of nitrogen-doped silicon oxycarbide (SiOC(N)) on the to-be-etched layer; and etching the first hard mask layer to have patterns corresponding to positions of subsequently formed openings. Further, the method includes forming the plurality of openings without substantial undercut between the to-be-etched layer and the first hard mask layer in the to-be-etched layer using the first hard mask layer as an etching mask; and forming a conductive structure in each of the openings.