SiON Gate Dielectric Nitrogen Gradient for Leakage and Mobility
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Solution Overview
Problem
Conventional SiON gate dielectrics have a trade-off between nitrogen concentration for reducing gate leakage and boron penetration, and carrier mobility, limiting the nitrogen concentration in the bulk layer due to interface-related degradation.
Innovation Solution
A SiON gate dielectric layer with distinct nitrogen concentration portions: a top portion for moderate N concentration, a bulk portion with high peak N concentration for leakage reduction, and a bottom portion with low N concentration to maximize carrier mobility and minimize threshold voltage shift and negative bias temperature instability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nitrogen concentration in the bulk of the SiON layer is increased to reduce gate leakage and boron penetration, then leakage reduction and boron blocking improve, but carrier mobility at the semiconductor surface degrades
Solution Approach 1:
The patent applies local quality by creating distinct nitrogen concentration zones within the SiON gate dielectric layer. The bulk portion has high nitrogen concentration (5-20 atomic %) for effective leakage reduction and boron blocking, while the interface portion has low nitrogen concentration (0-5 atomic %) to preserve carrier mobility at the semiconductor surface. This spatial variation in nitrogen concentration allows each region to optimize its local function without compromising overall device performance.
Solution Approach 2:
The gate dielectric layer is segmented into functionally distinct portions: a bulk portion and an interface portion with different nitrogen concentrations. This segmentation enables independent optimization of leakage protection (bulk) and carrier transport (interface), resolving the trade-off between reliability and manufacturing precision by treating them as separate controllable parameters.
2Reliability
If nitrogen concentration in the SiON layer is increased to achieve low leakage and high boron blocking, then reliability improves, but threshold voltage shift and negative bias temperature instability increase
Solution Approach 1:
By implementing local quality with spatially varying nitrogen concentration, the patent achieves high nitrogen content in the bulk for leakage and boron protection while maintaining low nitrogen content at the interface for voltage stability. This local differentiation allows the bulk to provide reliability benefits without causing interface-related threshold voltage shift and NBTI degradation.
Solution Approach 2:
The patent changes the nitrogen concentration parameter across different regions of the gate dielectric. The nitrogen concentration is varied from 5-20 atomic % in the bulk to 0-5 atomic % at the interface, allowing independent control of leakage characteristics and electrical stability parameters such as threshold voltage and NBTI performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decouples nitrogen concentration from the semiconductor interface, achieving significantly lower interface N concentration while maintaining low leakage, high boron blocking, and improved carrier mobility, thus eliminating the trade-off between leakage reduction and mobility.
Implementation Method 1
a bulk portion that has the highest peak N concentration, enables leakage reduction and a reduction in B penetration into the semiconductor surface
Implementation Method 2
The bottom portion has the lowest N concentration to maximize the carrier mobility in the channel region
Data Source
AI summary
An integrated circuit (IC) includes a substrate having a top semiconductor surface including at least one MOS device including a source and a drain region spaced apart to define a channel region. A SiON gate dielectric layer that has a plurality of different N concentration portions is formed on the top semiconductor surface. A gate electrode is on the SiON layer. The plurality of different N concentration portions include (i) a bottom portion extending to the semiconductor interface having an average N concentration of <2 atomic %, (ii) a bulk portion having an average N concentration >10 atomic %, and (iii) a top portion on the bulk portion extending to a gate electrode interface having an average N concentration that is ≧2 atomic % less than a peak N concentration of the bulk portion.