SiON Gate Dielectric Sidewall Nitrogen Retention
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Solution Overview
Problem
Conventional gate-first process flows for MOS transistors with SiON gate dielectrics lead to significant nitrogen (N) loss at the sidewalls during gate etching, resulting in reduced Gate Oxide Integrity (GOI) and increased Early Failure Rates (EFR), as the sidewalls are exposed and nitrogen depletion occurs before a capping layer can be effectively applied.
Innovation Solution
A supplemental oxidation and nitridation process is implemented to form a nitrogen-enhanced SiON gate dielectric layer by forming a silicon oxide layer on exposed sidewalls, which is then nitrided using plasma nitridation, followed by a post-nitridation anneal to stabilize the added nitrogen and repair defects, thereby maintaining or exceeding the original nitrogen concentration along the sidewalls.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional gate-first process flow is used with SiON gate dielectric, then the gate dielectric can be formed with initial nitrogen concentration, but significant nitrogen loss occurs at sidewalls during gate etching, resulting in reduced Gate Oxide Integrity and increased Early Failure Rates
Solution Approach 1:
A nitrogen-rich capping layer is deposited on the gate dielectric sidewalls before gate etching to prevent nitrogen loss. This preliminary protective action ensures that when etching occurs, the sidewalls are already protected, eliminating the nitrogen depletion problem that would otherwise occur during the etching process.
Solution Approach 2:
A nitrogen-rich capping layer is introduced as an intermediary substance between the gate dielectric sidewalls and the etching environment. This intermediate layer acts as a barrier that prevents nitrogen diffusion and loss during gate etching, thereby maintaining the nitrogen concentration and improving Gate Oxide Integrity.
2Quantity of substance
If the gate etch depletion effect is reduced by changing etch conditions, then some nitrogen loss can be prevented, but this does not fully address the sidewall nitrogen depletion problem
Solution Approach 1:
Instead of attempting to control the etching process to minimize nitrogen loss, the invention applies a nitrogen-rich capping layer before etching. This preliminary action proactively prevents nitrogen loss rather than relying on precise etch control, achieving better nitrogen retention without compromising manufacturing precision.
Solution Approach 2:
The invention converts the harmful effect of gate etching (which causes nitrogen loss) into a beneficial process by using the etching step itself to define the gate structure while the pre-applied nitrogen-rich capping layer protects the sidewalls. The etching process is no longer harmful to nitrogen concentration because the protection is already in place.
3Reliability
If a capping layer is applied immediately after gate etch to protect sidewalls, then nitrogen loss can be prevented, but the cleaning step required between etch and cap deposition causes time delay, allowing nitrogen loss to occur during exposure
Solution Approach 1:
The nitrogen-rich capping layer is applied before gate etching rather than after, eliminating the time delay caused by cleaning steps. This preliminary action ensures continuous protection of the sidewalls throughout the entire process, preventing nitrogen loss during the exposure period that would otherwise occur between etching and capping.
Solution Approach 2:
The protective capping layer remains in place continuously from before etching through the etching process itself, providing uninterrupted protection. This continuous protective action eliminates gaps in protection that would occur with post-etch capping, where cleaning steps create exposure time allowing nitrogen loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents nitrogen loss and enhances the integrity of the SiON gate dielectric layer, improving Gate Oxide Integrity and reducing Early Failure Rates by maintaining or exceeding the original nitrogen concentration along the sidewalls, thus stabilizing the gate dielectric and reducing polysilicon finger failures.
Implementation Method 1
a supplemental silicon oxide layer is formed on the exposed SiON sidewalls
Implementation Method 2
The nitridation of the supplemental silicon oxide layer can comprise a plasma nitridation process such as Decoupled-plasma nitridation (DPN)
Implementation Method 3
A post nitridation anneal (PNA) follows the nitridation to form an annealed N-enhanced SiON gate dielectric layer
Data Source
AI summary
A method of forming an integrated circuit (IC) having at least one MOS device includes forming a SiON gate dielectric layer on a silicon surface. A gate electrode layer is deposited on the SiON gate layer and then patterning forms a gate stack. Exposed gate dielectric sidewalls are revealed by the patterning. A supplemental silicon oxide layer is formed on the exposed SiON sidewalls followed by nitriding. After nitriding, a post nitridation annealing (PNA) forms an annealed N-enhanced SiON gate dielectric layer including N-enhanced SiON sidewalls, wherein along lines of constant thickness a N concentration at the N-enhanced SiON sidewalls is ≧ the N concentration in a bulk of the annealed N-enhanced SiON gate layer −2 atomic %. A source and drain region on opposing sides of the gate stack are formed to define a channel region under the gate stack.