SIP Memory Controller Accessing External Packaged Non-Volatile Storage
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Solution Overview
Problem
Conventional system-in-package (SIP) solutions are limited by the amount of memory they can embed within their package, making it challenging to support larger memory requirements without increasing the package size or developing higher-density memory.
Innovation Solution
Incorporating a memory controller within the SIP that can support additional memory by coupling with external packaged solid state drives (SSDs) through interface hardware, allowing the SIP to control and access non-volatile memory arrays, such as NAND-based storage media, via a stacked package-on-package configuration or substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory is embedded within the SIP package, then memory integration is achieved, but the amount of memory is limited by package capacity
Solution Approach 1:
The patent transitions from two-dimensional planar integration to three-dimensional stacked integration by coupling the SIP package with external packaged memory devices in a vertical configuration. This dimensional change allows the memory controller to access memory resources both within the SIP package and in external devices stacked above it, effectively increasing memory capacity without expanding the package footprint.
Solution Approach 2:
The patent implements a nested structure where external packaged memory devices are stacked on top of the SIP package, creating a hierarchical memory architecture. The memory controller within the SIP package manages memory resources at multiple levels - embedded memory within the SIP and external memory in the stacked packages - allowing efficient utilization of memory capacity across different physical layers.
2Quantity of substance
If multiple separate components are mounted on a circuit board, then memory capacity can be increased, but the form factor and footprint increase
Solution Approach 1:
The patent merges the memory controller function with the SIP package, creating an integrated control unit that manages both embedded and external memory resources. This consolidation eliminates the need for separate memory controllers for each memory device, reducing the number of discrete components and minimizing the footprint while maintaining the ability to access large memory capacities through the unified memory controller.
Solution Approach 2:
The patent resolves the footprint contradiction by transitioning from horizontal expansion (mounting multiple components on a circuit board) to vertical stacking (coupling external memory packages above the SIP package). This dimensional change allows memory capacity to be increased by utilizing the vertical dimension, thereby maintaining a small footprint while achieving high memory capacity.
3Quantity of substance
If higher-density memory is developed, then memory capacity within package can be increased, but manufacturing complexity increases
Solution Approach 1:
The patent segments the memory system into two distinct parts: embedded memory within the SIP package and external memory in separate packaged devices. This segmentation allows each component to be manufactured independently using optimized processes for its specific requirements, avoiding the need to increase density (and manufacturing complexity) of the embedded memory while still achieving high overall memory capacity through the external memory devices.
Data Source
AI summary
Techniques and mechanisms for a SIP to control access to a non-volatile memory of another packaged device. In an embodiment, the SIP includes interface a processor, a local memory and a memory controller that provides the processor with access to the local memory. The SIP further includes interface hardware to couple the SIP to the packaged device, wherein the processor of the SIP accesses a non-volatile memory of the packaged device via the memory controller of the SIP. In another embodiment, the interface hardware of the SIP includes a first plurality of contacts to couple to the packaged device, as well as a second plurality of contacts. An interface standard describe an arrangement of interface contacts, wherein, of a first arrangement of the first contacts and the second arrangement of the second contacts, only the second arrangement conforms to the described arrangement of interface contacts.