SIP Module Integrating Memory Controller and Cache

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Solution Overview

Problem

Standard memory designs for application logic ICs result in suboptimal performance, efficiency, and cost due to the need for memory controllers that communicate with various different standard memories, limiting the potential of system-in-package (SIP) modules that integrate application logic ICs, known good die memories, and memory controllers.

Innovation Solution

A system-in-package (SIP) module that integrates a cache memory, a memory controller, and a memory on a shared semiconductor chip, with the memory controller and cache memory formed on the same chip, allowing for optimized performance, efficiency, and cost by customizing the module to respond to various memories and logic integrated circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If standard memory designs are used with memory controllers communicating with various different standard memories, then compatibility with different memory types is achieved, but performance, efficiency, and cost are suboptimal

Engineering Contradiction:
Improvecompatibility with different memory typesVSAvoidperformance and efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The memory controller is integrated directly into the semiconductor memory device, allowing the same memory device to serve multiple functions and different applications without requiring external memory controllers. This integration enables the memory device to be universally applicable across different systems while optimizing performance for each specific use case.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the memory controller and memory device into a single integrated semiconductor device. This merging eliminates the need for separate external controllers and reduces the number of components, thereby improving performance, efficiency, and cost-effectiveness while maintaining compatibility with different memory types.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If memory controllers are designed to respond to various different standard memories, then versatility is improved, but device complexity increases

Engineering Contradiction:
Improveability to respond to various memoriesVSAvoidmemory controller design complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

By integrating the memory controller directly into the semiconductor memory device, the patent reduces overall system complexity. The controller and memory become a single unified component, eliminating the need for complex external controller designs and reducing the number of interconnections required.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated memory controller is designed to handle multiple memory types and protocols within a single device, reducing the need for multiple specialized controllers. This multi-functional approach simplifies the overall system architecture while maintaining versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If SIP modules integrate application logic ICs, known good die memories, and memory controllers, then system performance is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvesystem performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent integrates the memory controller and memory device into a single semiconductor device that can be manufactured as one unit. This integration simplifies the SIP module assembly process by reducing the number of separate components that need to be packaged and interconnected, thereby improving ease of manufacture while maintaining high system performance.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10504603B2System-in-package module with memory
Publication Date: 2019.12.10 ETRON TECH INC
  • US10504603B2 patent drawing
  • US10504603B2 patent drawing
  • US10504603B2 patent drawing

AI summary

A system-in-package module with memory includes a non-memory chip, a substrate, and a memory chip. The non-memory chip has a first portion and a second portion. The substrate has a window and the substrate is electrically connected to the second portion of the non-memory chip. The memory chip is placed into the window of the substrate to electrically connect the first portion of the non-memory chip, and there is no direct metal connection between the memory chip and the substrate.