SiP Module Pad Rearrangement for Direct Electronic Coupling
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Solution Overview
Problem
In system-in-package modules, it is challenging to electronically couple pads of memory dies with pads of a logic IC without using longer wire bonds or additional redistribution layers, especially when the pads are covered by an active circuit region, leading to increased form factor and material costs.
Innovation Solution
The system-in-package module rearranges the locations of pads on memory dies within a bundled memory to avoid coverage by the active circuit region, allowing direct electronic coupling without longer wire bonding or additional redistribution layers by rotating or mirror mapping the pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pads of memory dies are covered by active circuit region of logic IC, then electronic coupling becomes difficult, but using longer wire bonds or additional redistribution layers increases form factor and material costs
Solution Approach 1:
The pads of the memory dies are rearranged to specific locations before the logic IC is placed, ensuring that the pads are not covered by the active circuit region. This preliminary arrangement of pads allows for direct electronic coupling without requiring additional wire bonds or redistribution layers, thus avoiding increased form factor and material costs
Solution Approach 2:
The pads are arranged in different locations on the memory dies, utilizing spatial dimensionality to position pads in areas not covered by the logic IC's active circuit region. This dimensional rearrangement enables direct coupling while maintaining a compact form factor
2Reliability
If pads of memory dies are covered by active circuit region of logic IC, then electronic coupling becomes difficult, but using longer wire bonds or additional redistribution layers increases material costs
Solution Approach 1:
The pads of the memory dies are rearranged to specific locations before the logic IC is placed, ensuring that the pads are not covered by the active circuit region. This preliminary arrangement of pads allows for direct electronic coupling without requiring additional wire bonds or redistribution layers, thus avoiding increased material costs
3Ease of manufacture
If conventional dicing process is used with covered pads, then manufacturing is simpler, but system level delay time increases
Solution Approach 1:
The pads are rearranged to non-covered locations before the dicing and packaging processes, enabling direct electronic coupling that reduces system level delay time while maintaining manufacturing simplicity through conventional dicing processes
Data Source
AI summary
A system-in-package module includes a non-memory chip, a bundled memory, and an encapsulation package material. The non-memory chip has a plurality of pads. The bundled memory includes a first memory die and a second memory die side-by-side formed over a substrate, wherein the first memory die includes a first group of pads and the second memory die includes a second group of pads. The encapsulation package material encloses the non-memory chip and the bundled memory, and the non-memory chip is electronically coupling with the bundled memory through the plurality of pads, the first and the second group of pads. The first group of pads corresponds to the second group of pads by rotating a predetermined degree or by mirror mapping.