SIP Substrate Passive Component Integration Signal Integrity
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Solution Overview
Problem
Current integrated circuit packaging systems face challenges in achieving high signal quality without increasing package size, particularly in high-speed devices that require tight impedance control, and struggle with incorporating discrete passive components efficiently in system-on-chip (SOC) and system-in-package (SIP) designs.
Innovation Solution
The system involves fabricating a system-in-package substrate, mounting two integrated circuit dice closely together with a minimum space, and coupling passive components over and between them, using on-die contacts like solder paste or conductive epoxy for direct mounting and electrical interconnects to improve signal quality and reduce interconnect paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete passive components are mounted on substrate adjacent to ICs with bonding wires, then electrical connections are established, but signal quality deteriorates due to long interconnect paths and impedance control issues
Solution Approach 1:
The patent merges the passive components directly with the IC die by forming conductive pathways through the substrate that connect component terminals directly to IC contact pads, eliminating separate bonding wire interconnects and reducing overall path length
Solution Approach 2:
The substrate acts as an intermediary by providing embedded conductive pathways that directly connect passive components to ICs, replacing the traditional bonding wire intermediary and enabling tighter impedance control
2Reliability
If ICs are pushed closer together to reduce interconnect path effects, then signal quality improves, but manufacturing complexity increases due to reconfiguration requirements
Solution Approach 1:
The patent segments the functional elements (ICs and passive components) and distributes them throughout the substrate, allowing flexible arrangement that minimizes interconnect paths while maintaining standard manufacturing processes
Solution Approach 2:
The patent utilizes three-dimensional placement of components and multi-layer substrate routing to reduce interconnect path length without requiring ICs to be pushed closer together in the planar dimension, thereby avoiding manufacturing reconfiguration
3Reliability
If more interconnect structures are added to accommodate high-speed interconnections, then signal quality improves, but package size increases
Solution Approach 1:
The patent embeds passive components within the package structure and integrates their interconnect pathways within the substrate layers, nesting multiple functions within a compact volume without increasing overall package footprint
Data Source
AI summary
An integrated circuit packaging system comprising: fabricating a system-in-package substrate; mounting a first integrated circuit die on the system-in-package substrate; mounting a second integrated circuit die on the system-in-package substrate; and coupling a passive component over and between the first integrated circuit die and the second integrated circuit die.