SIP Semiconductor Power Management via Distributed Alive Blocks
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Solution Overview
Problem
Conventional System in Package (SIP) semiconductor devices lack effective power supply management, with chips unable to flexibly manage power due to centralized control, leading to inefficiencies and increased size and power consumption.
Innovation Solution
The SIP semiconductor device includes 'alive' blocks continuously powered to manage chip states, with local interfaces and intellectual property blocks connected through signal lines for efficient power management, allowing external wake-up and initialization signals to control power distribution among chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If centralized power control is used where one chip controls power supply to other chips, then power management can be simplified, but power management flexibility is reduced and device size increases
Solution Approach 1:
The power management function is segmented and distributed to each chip's alive block individually. Each alive block can independently control power supply to its own chip and communicate with other alive blocks, replacing the centralized control model where one chip controls all others. This segmentation enables both simplified individual chip management and flexible system-wide power management.
2Reliability
If each chip includes complete components (controller, memory, interface), then each chip can operate independently, but device size and power consumption increase
Solution Approach 1:
The system implements dynamic power management where each chip's alive block can independently control the power state of its own chip and coordinate with other alive blocks. This dynamic control allows chips to enter low-power states when not needed while maintaining the capability for independent operation, thus reducing overall power consumption without sacrificing operational independence.
3Adaptability or versatility
If complete interface and controller are included in each chip, then each chip can function autonomously, but the second chip cannot be configured with only memory
Solution Approach 1:
Each alive block is equipped with self-service capabilities to manage its own chip's power state and communicate with other alive blocks autonomously. This self-service mechanism enables chips to be configured with different component sets (e.g., memory-only second chip) while maintaining system functionality, as each alive block can independently handle power management without requiring complete interface and controller on every chip.
Data Source
AI summary
Provided are a system in package (SIP) semiconductor device suitable for efficient power management, and a method of managing power of the SIP semiconductor device. The SIP semiconductor device includes chips including first and second chips. Each of the chips includes an alive block, a local interface, and an intellectual property (IP) block. The alive block is continuously supplied with power in order to continuously be in an on-state. The local interface transmits/receives data to/from other chips. The IP block individually stores and processes data. The alive blocks of the chips are connected to each other through a first signal line unit for transmitting a signal required to wake up or initialize the chips. The alive blocks control power to the chips, respectively, in response to an external wake-up instruction signal or the signal transmitted through the first signal line unit. Therefore, power can be efficiently managed since power that is supplied to the chips of the SIP semiconductor device is managed by the alive blocks or the local interfaces of the chips.