SIP IC Self-Generating Reference Voltage

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Solution Overview

Problem

In System in Package (SIP) integrated circuits, the existing technology faces challenges where the logic circuit chip may not be able to provide the input reference voltage to the DDR memory chip, and the physical layout can complicate wire bonding due to mismatched pin locations for the input and output reference voltage connections.

Innovation Solution

The SIP integrated circuit self-generates the input reference voltage within the memory chip using a voltage generator, eliminating the need for the logic circuit chip to provide it, and allows for reduced wire bonding complexity by integrating the DDR memory chip and logic circuit chip in close proximity without serial and terminal resistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the logic circuit chip provides the input reference voltage to the DDR memory chip, then the memory chip can operate according to the reference voltage, but the wire bonding complexity increases due to mismatched pin locations

Engineering Contradiction:
Improvereference voltage supplyVSAvoidwire bonding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory chip is equipped with a voltage generator that can autonomously generate the input reference voltage from an external voltage source. This self-service capability eliminates the need for the logic circuit chip to provide the reference voltage, thereby simplifying the wire bonding requirements and allowing greater flexibility in pin location matching.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The reference voltage generation function is separated from the logic circuit chip and integrated into the memory chip itself. This segmentation allows the memory chip to independently generate its own reference voltage, reducing the inter-chip wiring complexity while maintaining reliable voltage supply.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the logic circuit chip provides the input reference voltage, then the voltage can be shared between circuits, but the packaging flexibility is reduced

Engineering Contradiction:
Improvepackaging flexibilityVSAvoidvoltage generation structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory chip generates its own reference voltage internally, making it self-sufficient and independent of the logic circuit chip's voltage output capabilities. This enhances packaging flexibility as the chips can be positioned and connected without strict pin location matching requirements.

Inventive Principle:
Principle #25Self-service

3Reliability

If serial and terminal resistors are used for signal transmission, then signal integrity is maintained, but the device complexity and component count increase

Engineering Contradiction:
Improvesignal integrityVSAvoidcomponent count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the serial and terminal resistors from the signal transmission path by enabling the memory chip to generate its own reference voltage. This extraction of unnecessary components simplifies the overall circuit structure while maintaining signal integrity through the self-generated reference voltage.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8125838B2System in package integrated circuit with self-generating reference voltage
Publication Date: 2012.02.28 ETRON TECH INC
  • US8125838B2 patent drawing
  • US8125838B2 patent drawing
  • US8125838B2 patent drawing

AI summary

This invention provides a system in package integrated circuit with self-generating reference voltage, in which includes a logic circuit chip and a memory chip. The logic circuit chip generates a plurality of output signals, and the memory chip includes a plurality of input circuit receiving the plurality of output signals from the logic circuit chip. The memory chip further includes a voltage generator generating an input reference voltage based on an output supply voltage. The memory chip is compatible with DDR standard and the plurality of input circuit thereof is compatible with SSTL_2 standard. Wherein, each input circuit comprises a comparator with a first input terminal receiving one of the plurality of output signals and a second input terminal receiving the input reference voltage.