SiP Module Substrate Embedding for Height Reduction

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Solution Overview

Problem

Semiconductor packages with taller components require more encapsulant, leading to increased physical size and waste, as the encapsulant must cover the tallest component, making them larger than necessary.

Innovation Solution

The formation of System-in-Package (SiP) modules with embedded inductors and semiconductor packages, where taller components are placed within openings in the substrate, reducing the overall package height and minimizing encapsulant usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If taller components are used in SiP modules, then electrical functionality is enhanced, but package height increases and encapsulant is wasted

Engineering Contradiction:
Improveelectrical functionalityVSAvoidpackage height
Core Design Contradiction:
Adaptability or versatilityVSLength of stationary object

Solution Approach 1:

The patent embeds taller passive components such as inductors within openings formed in the substrate, nesting them within the substrate structure rather than mounting them on the surface. This allows the components to be contained within the substrate's vertical space, reducing the overall package height while maintaining the necessary electrical functionality.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from surface-mount placement to through-substrate embedding, changing the dimensional arrangement of components. By moving components from a two-dimensional surface mounting approach to a three-dimensional embedding approach within substrate openings, the package height is reduced while preserving component functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If taller components are used in SiP modules, then electrical functionality is enhanced, but more encapsulant is required

Engineering Contradiction:
Improveelectrical functionalityVSAvoidencapsulant waste
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

By nesting taller components within substrate openings, the encapsulant only needs to fill the remaining void spaces within the substrate structure rather than covering the entire height of mounted components. This significantly reduces the volume of encapsulant material required while still providing necessary environmental protection.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent extracts the taller components from the surface mounting configuration and places them within the substrate interior. This extraction from the surface plane eliminates the need for excessive encapsulant to cover component heights, reducing material waste.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If taller components are used in SiP modules, then electrical functionality is enhanced, but device size increases

Engineering Contradiction:
Improveelectrical functionalityVSAvoiddevice size
Core Design Contradiction:
Adaptability or versatilityVSVolume of moving object

Solution Approach 1:

The embedding of taller components within substrate openings allows the device footprint and overall volume to be minimized. The components are contained within the substrate's internal space rather than extending the external dimensions, resulting in a more compact device size while maintaining enhanced electrical functionality.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

By utilizing the vertical dimension within the substrate for component placement rather than extending the external height, the patent achieves enhanced functionality without increasing the device's external volume. The component embedding strategy transforms the space utilization efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11367690B2Semiconductor device and method of forming an integrated SiP module with embedded inductor or package
Publication Date: 2022.06.21 STATS CHIPPAC MANAGEMENT PTE LTD
  • US11367690B2 patent drawing
  • US11367690B2 patent drawing
  • US11367690B2 patent drawing

AI summary

A semiconductor device has a substrate with a first opening and second opening formed in the substrate. A first semiconductor component is disposed on the substrate. The substrate is disposed on a carrier. A second semiconductor component is disposed on the carrier in the first opening of the substrate. A third semiconductor component is disposed in the second opening. The third semiconductor component is a semiconductor package in some embodiments. A first shielding layer may be formed over the semiconductor package. An encapsulant is deposited over the substrate, first semiconductor component, and second semiconductor component. A shielding layer may be formed over the encapsulant.