Embedded SiP Transformer Coils Without Leadframes or Wire Bonds

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current semiconductor devices with embedded transformers face issues such as high costs, electrical performance losses due to metal coupling, and complex assembly processes, particularly in System in a Package (SiP) designs using leadframes and Fan Out Panel Level Package technologies.

Innovation Solution

The integration of coils within a System in a Package using Panel Embedded Package (PEP) technology, employing Laser Direct Structuring (LDS) and Direct Copper Interconnection (DCI) to form coils in metallization levels, avoiding metal pads and wire bonding, thus reducing package thickness and footprint while enhancing electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If leadframe portions are used to support the transformer, then structural support is provided, but coupling losses occur due to metal shielding effects

Engineering Contradiction:

Improvestructural supportVSAvoidcoupling losses

Core Design Contradiction:

StrengthVSLoss of energy

Solution Approach 1:

The patent removes the leadframe structure entirely from the transformer assembly. The transformer is mounted directly on the PCB using surface-mount technology, eliminating the intermediate leadframe portions that caused metal shielding effects and coupling losses between primary and secondary coils.

Inventive Principle:

Principle #2Taking out (Extraction)

2Reliability

If wire bonding is used to connect coils, then electrical connections are established, but resistance increases and manufacturing complexity increases

Engineering Contradiction:

Improveelectrical connectionsVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical wire bonding process with direct PCB trace connections. The coils are soldered directly to copper traces on the PCB, eliminating the need for separate wire bonding steps and reducing both resistance and manufacturing complexity.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If metal pads are used for coil mounting, then electrical connections are provided, but inductance decreases due to parasitic effects

Engineering Contradiction:

Improveelectrical connectionsVSAvoidinductance

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent changes the electrical parameters of the connection system by using wide copper traces with optimized geometry instead of traditional metal pads. The trace design minimizes parasitic capacitance and inductance, preserving the coil's inductance while maintaining reliable electrical connections.

Inventive Principle:

Principle #35Parameter changes

4Adaptability or versatility

If Fan Out Panel Level Package technology is used, then integration is improved, but coupling losses occur due to silicon interaction

Engineering Contradiction:

ImproveintegrationVSAvoidcoupling losses

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent extracts the transformer from the Fan Out Panel Level Package structure, mounting it directly on the PCB as a surface-mount component. This eliminates the silicon substrate interaction that caused coupling losses while maintaining the integration benefits through direct PCB mounting.

Inventive Principle:

Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves inductance, reduces resistance, increases coupling coefficient and Q-factor, and offers cost reduction by eliminating the need for support frames and wire bonding, resulting in more flexible and efficient semiconductor device packaging.

Implementation Method 1

employing Laser Direct Structuring (LDS) and Direct Copper Interconnection (DCI) to form coils in metallization levels

Methodology Applied

Scientific EffectLaser Direct Structuring: Laser Ablation

Implementation Method 2

employing Laser Direct Structuring (LDS) and Direct Copper Interconnection (DCI) to form coils in metallization levels

Methodology Applied

Scientific EffectDirect Copper Interconnection: Electroplating

Data Source

PatentEP4312239A1Method of manufacturing semiconductor devices and corresponding semiconductor device

Publication Date: 2024.01.31 STMICROELECTRONICS SRL

Figure 1~2
Figure 3
Figure 4~5

AI summary

Semiconductor devices of the type currently referred to as a System in a Package or SiP and having embedded therein a transformer are produced by embedding at least one semiconductor chip (14) in an insulating encapsulation (180) at a first portion thereof. Over a second portion of the substrate at least partly non-overlapping with the first portion of the substrate (180) having the at least one semiconductor chip (14) embedded therein, stacked structure is formed including a plurality of layers of electrically insulating material (Ll, L2, L3, L4) as well as respective patterns of electrically conductive material. The respective patterns of electrically conductive material have: a planar coil geometry, thus providing electrically conductive coils such as the windings of a transformer (181, 182) or a geometrical distribution providing electrically conductive connections to one or more semiconductor chips (14).