Integrated SiPM Readout With On-Chip TDCs for PET Timing
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Solution Overview
Problem
Existing analog silicon photomultiplier (SiPM) systems for PET and PET-MRI scanners face issues with large output capacitance, bulkiness due to external readout electronics, and high power dissipation, leading to degraded timing performance and complexity.
Innovation Solution
An integrated imaging system with on-chip electronics, including segmented SiPMs and time-to-digital converters, reduces capacitive load by using a fast terminal for timing measurements and a standard terminal for energy measurements, coupled with an automatic on-chip error correction algorithm to enhance timing resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external readout electronics are used with analog SiPMs, then the system can process signals, but the output capacitance increases and timing resolution deteriorates
Solution Approach 1:
The patent integrates the readout electronics directly onto the SiPM chip, merging the photodetector array with the signal processing circuitry. This integration reduces the output capacitance by eliminating external connections and minimizes the timing jitter introduced by external electronics, thereby improving timing resolution while maintaining signal processing capability.
Solution Approach 2:
The patent introduces an on-chip buffer stage as an intermediary between the SiPM photodetectors and the external readout electronics. This buffer reduces the capacitive load on the photodetectors by providing a low-impedance output stage, thereby improving timing resolution without requiring complete integration of all electronics on the chip.
2Ease of operation
If external readout electronics are coupled with analog SiPMs, then signal processing is enabled, but the system becomes bulkier and power dissipation increases
Solution Approach 1:
The patent integrates the readout electronics directly onto the SiPM chip, merging the photodetector array with the signal processing circuitry. This integration reduces the overall system size by eliminating separate external electronics packages and reduces power dissipation by minimizing the number of external connections and reducing the total component count.
3Measurement precision
If multiple separate ASICs are used for each SiPM in an array, then individual readout is achieved, but wiring complexity and system bulk increase significantly
Solution Approach 1:
The patent integrates multiple readout channels directly onto a single SiPM chip, merging what would otherwise require multiple separate ASICs into one integrated device. This integration dramatically reduces wiring complexity by eliminating the need for extensive external interconnections while maintaining individual channel readout capability through on-chip multiplexing or parallel processing circuits.
4Measurement precision
If on-chip electronics are integrated with SiPM array, then timing resolution improves and capacitive load reduces, but manufacturing complexity increases
Solution Approach 1:
The patent integrates the readout electronics directly onto the SiPM chip using standard semiconductor fabrication processes. This approach, while increasing manufacturing complexity compared to discrete components, leverages existing CMOS or SiPM fabrication capabilities to produce integrated devices in high volumes, making the increased complexity manageable through established manufacturing techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system achieves improved timing resolution (10-20 ps) and compact design, enabling better gamma interaction time and position estimation for enhanced image quality in PET applications.
Implementation Method 1
silicon photomultiplier (SiPM) arrays are arrays of avalanche photodiodes that operate above the breakdown voltage
Implementation Method 2
arrays of avalanche photodiodes that operate above the breakdown voltage
Data Source
AI summary
The present invention relates to an integrated imaging system. The integrated imaging system includes an array of analog photomultiplier elements. The integrated imaging system includes a plurality of submodules, each submodule having a number of the photomultiplier elements. The integrated imaging system includes a plurality of time-to-digital converters each associated and coupled with one of the submodules. The plurality of time-to-digital converters are configured to provide a respective timing information.