3D Interlocking SIS Photonic Modulator for Low-Loss Phase Shift
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Solution Overview
Problem
Existing optical modulators in photonic computing systems face limitations in generating large optical phase shifts with reduced optical insertion loss and require larger device sizes for efficient modulation.
Innovation Solution
The development of a photonic device with a stacked structure of alternating silicon and polysilicon terminals, arranged in an interlocking configuration, and a capacitor dielectric layer, which enhances the overlap of the optical mode electric field with charge carriers, allowing for sub-1V phase modulation and reduced optical insertion loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional optical modulators are used to generate large optical phase shifts, then the modulation depth is improved, but the device size increases and optical insertion loss increases
Solution Approach 1:
The patent transitions from planar 2D modulator geometry to a 3D stacked configuration with alternating n-type and p-type semiconductor layers separated by dielectric layers. This vertical stacking in the third dimension increases the interaction length between light and charge carriers without increasing the lateral footprint, enabling large optical phase shifts in a compact device footprint.
Solution Approach 2:
The modulator employs a composite structure consisting of alternating layers of n-type semiconductor material, p-type semiconductor material, and dielectric material. This composite architecture creates multiple interfaces and enables simultaneous electron and hole plasma effects, enhancing the optical phase shift per unit length while maintaining a compact size.
2Measurement precision
If conventional optical modulators are used to generate large optical phase shifts, then the modulation depth is improved, but the optical insertion loss increases
Solution Approach 1:
By stacking multiple semiconductor-dielectric layers vertically, the patent increases the effective interaction length between the optical mode and charge carriers without requiring a larger lateral device size. This dimensional transition allows achieving large optical phase shifts with reduced optical insertion loss compared to conventional planar designs.
Solution Approach 2:
The patent optimizes critical parameters including the thickness of semiconductor layers (50-200 nm), dielectric layer thickness (20-100 nm), and doping concentrations to balance the optical phase shift generation with minimal optical absorption. By carefully controlling these parameters, the modulator achieves high modulation efficiency with reduced optical insertion loss.
3Productivity
If conventional optical modulators are used for efficient modulation, then the modulation efficiency is improved, but the power consumption increases
Solution Approach 1:
The vertical stacking architecture increases the interaction length between light and charge carriers without proportionally increasing the voltage required for modulation. This enables high modulation efficiency with reduced power consumption compared to conventional planar modulators that require larger device sizes and higher voltages.
Solution Approach 2:
The alternating n-type and p-type semiconductor layers create multiple plasma generation zones that enhance the optical phase shift per unit voltage. This composite structure improves modulation efficiency while reducing the voltage required for modulation, thereby lowering power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves larger optical phase shifts with smaller device sizes and lower optical insertion loss, improving modulation efficiency and reducing power consumption.
Implementation Method 1
a capacitor dielectric layer, which enhances the overlap of the optical mode electric field with charge carriers, allowing for sub-1V phase modulation
Data Source
AI summary
An embodiment photonic device may include a first terminal including silicon and a second terminal including polysilicon. The first terminal may be configured as a first three-dimensional structure extending along a first direction and having a first U-shaped portion in a first cross-sectional plane perpendicular to the first direction. Similarly, the second terminal may be configured as a second three-dimensional structure extending along the first direction and having a second U-shaped portion in the first cross-sectional plane. The photonic device may further include a capacitor dielectric layer disposed between the first terminal and the second terminal and a cladding dielectric layer surrounding the first terminal and the second terminal. The first U-shaped portion and the second U-shaped portion may be arranged in an interlocking configuration having an overlapping region that is configured as an optical transmission line in which the first direction is an optical propagation direction.