Six-Phase Chopper Amplifier for Low-Glitch Capacitive Feedback
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Solution Overview
Problem
Conventional capacitively coupled chopper amplifiers face issues with input common mode definition and output glitches due to the need for biasing resistors, which introduce noise and limit frequency performance.
Innovation Solution
The amplifier employs six phases: two zeroing phases to set the input common mode without biasing resistors, two passive charge transfer phases to resolve settling issues, and two chopping and amplification phases, allowing the feedback capacitors to be charged efficiently, eliminating the need for biasing resistors and reducing glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If biasing resistors are used to define input common mode, then input common mode is established, but noise increases and frequency performance is limited
Solution Approach 1:
The patent removes biasing resistors from the circuit entirely, extracting the harmful noise-generating component while maintaining input common mode definition through an alternative mechanism (capacitive coupling with virtual ground). This directly resolves the contradiction by eliminating the source of noise while preserving the necessary common mode functionality.
Solution Approach 2:
The patent introduces a virtual ground node created by capacitive coupling as an intermediary mechanism to establish input common mode without requiring physical biasing resistors. This intermediary approach allows common mode definition while avoiding the noise and frequency limitations associated with resistive biasing.
2Productivity
If feedback capacitors are recharged on each chopping cycle, then amplification is maintained, but output glitches and settling issues occur
Solution Approach 1:
The patent performs preliminary charging of feedback capacitors during dedicated transfer phases before the chopping amplification phase begins. This preliminary action ensures capacitors are fully charged to the correct voltage levels beforehand, preventing output glitches and settling issues during the actual amplification cycles while maintaining continuous productivity.
Solution Approach 2:
The patent segments the operational cycle into distinct phases: transfer phases for capacitor charging and chopping phases for amplification. This segmentation separates the charging function from the amplification function, allowing feedback capacitors to be recharged without causing output glitches during the amplification phase, thereby maintaining both productivity and reliability.
3Device complexity
If conventional two-phase design is used, then circuit simplicity is maintained, but common mode issues and settling problems arise
Solution Approach 1:
The patent divides the operational cycle into six distinct phases (two transfer phases, two chopping phases, and two intermediate phases) to separately handle capacitor charging, common mode establishment, and signal amplification. This segmentation resolves common mode issues and settling problems by providing dedicated time for each function, accepting increased temporal complexity to achieve superior measurement precision.
Solution Approach 2:
The patent implements periodic switching between different operational phases (transfer and chopping) to systematically address both capacitor charging and signal amplification requirements. This periodic action allows the circuit to alternate between establishing common mode/voltage levels and performing amplification, resolving the trade-off between circuit simplicity and output accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves a maximum offset voltage of 10 μV, an input bias current of 100 pA, and a bandwidth exceeding 40 kHz, enhancing frequency performance and precision without introducing noise.
Implementation Method 1
capacitively coupled chopper amplifier
Data Source
AI summary
A six phase capacitively coupled chopper amplifier. Two phases provide a zeroing phase to zero the feedback capacitors and set the input common mode value. Two phases provide a passive transfer of an input charge from the input capacitors to the zeroed feedback capacitors. The final two phases are chopping and amplification phases. The zeroing phases address the input common mode without the need for biasing resistors. The passive transfer phases resolve the glitching that occurs if the feedback capacitors have to be recharged on each cycle of the chopping clock. Resolving the glitching and the charge time allows the frequency of the amplifier to increase.