Six-Transistor Pixel Circuit for Ultra-High Resolution Displays
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Solution Overview
Problem
Conventional pixel circuits require seven or more transistors, limiting their application to ultra-high resolution display apparatus due to integration challenges.
Innovation Solution
A pixel circuit design incorporating six transistors and two capacitors, with a timing scheme that separates data writing, initialization, and threshold voltage compensation periods, enabling internal compensation and allowing for higher integration, suitable for ultra-high resolution displays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional pixel circuits with seven or more transistors are used, then reliable pixel operation is achieved, but integration density decreases making ultra-high resolution displays impossible
Solution Approach 1:
The patent combines multiple functions into fewer transistors. Specifically, the first transistor serves both as a drive transistor controlling the light emitting element and as part of the compensation circuitry. The gate node of the first transistor is connected to the second electrode of the third transistor, creating a shared control mechanism that reduces the total transistor count while maintaining reliability through functional integration.
Solution Approach 2:
Transistors in the pixel circuit are designed to perform multiple functions. The first transistor acts as both a drive transistor for the light emitting element and participates in threshold voltage compensation. The fourth transistor provides both initialization of the gate node and acts as a switch for the compensation capacitor, demonstrating multi-functionality that reduces overall circuit complexity.
2Manufacturing precision
If more transistors are used in pixel circuits, then better compensation and control functions are achieved, but the pixel area increases reducing resolution capability
Solution Approach 1:
The compensation function is merged into the existing transistor structure rather than adding separate compensation circuitry. The third transistor with its control electrode receiving a compensation gate signal and its second electrode connected to the second node of the first transistor provides threshold voltage compensation without requiring additional transistors beyond the six already in the circuit.
Solution Approach 2:
The patent utilizes the gate node voltage as a shared control point between multiple functions. By connecting the gate node to both the light emitting element control and the compensation capacitor, the circuit achieves comprehensive control in a compact arrangement that doesn't increase pixel area.
3Device complexity
If transistor count is reduced to six, then integration density improves for ultra-high resolution displays, but circuit functionality must be simplified
Solution Approach 1:
Each of the six transistors is designed to perform multiple functions. The first transistor controls the light emitting element and participates in compensation. The second transistor handles data writing. The third transistor provides threshold voltage compensation. The fourth transistor performs initialization and switching. The fifth transistor handles anode node initialization. This multi-functionality maintains comprehensive circuit capability with reduced transistor count.
Solution Approach 2:
The circuit functions are segmented into distinct time periods (initialization period, compensation period, data writing period, emission period) with specific transistors activated during each period. This temporal segmentation allows fewer transistors to perform multiple functions at different times, maintaining versatility while reducing overall transistor count.
Data Source
AI summary
A pixel circuit includes a first transistor connected to a gate node, receiving a first power voltage, and connected to a second node, a second transistor receiving a data writing gate signal, receiving a data voltage, and connected to a first node, a third transistor receiving a compensation gate signal, connected to the gate node, and connected to the second node, a fourth transistor receiving an initialization gate signal, receiving an initialization voltage, and connected to the gate node, a fifth transistor receiving the initialization gate signal, connected to the first node, and connected to an anode node, a sixth transistor receiving an emission signal, connected to the second node, and connected to the anode node, and a light emitting element connected to the anode node and receiving a second power voltage.