Inter-Processor Communication via Size-Indexed Buffer Mapping

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Solution Overview

Problem

In multi-processor systems, frequent interrupt signals and memory slack issues arise from variable message sizes, leading to performance degradation and security vulnerabilities, especially when using shared memory protocols.

Innovation Solution

A multi-processor system employs a size-index table to map payload sizes to indices, allowing direct memory access controllers to allocate buffers and reduce interrupt signals by using pre-allocated buffers with a pointer array, eliminating the need for memory pointers and minimizing slack.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a pre-allocated fixed-size buffer is used in the memory unit associated with the receiving processor, then the receiving processor can store received data messages without dynamic allocation, but this results in a large amount of slack (unused memory) spread out over the memory unit

Engineering Contradiction:
Improvemessage reception speedVSAvoidmemory slack
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The memory unit is segmented into multiple fixed-size buffers of different sizes, each capable of holding messages of specific sizes. This segmentation allows the system to pre-allocate memory efficiently without excessive slack, as each buffer is sized appropriately for its intended message type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Buffers are pre-allocated and organized in a buffer pool before message reception begins. The receiving processor maintains this pool of pre-configured buffers, eliminating the need for dynamic memory allocation during message reception and reducing slack through proper initial sizing.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the receiving processor gets information regarding the size of the message to allocate a buffer of appropriate size prior to receiving the payload portion, then the buffer allocation is optimized, but this generates interrupt signals that increase processing overhead

Engineering Contradiction:
Improvebuffer allocation efficiencyVSAvoidinterrupt signal processing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The receiving processor pre-allocates a pool of buffers of various sizes before message reception begins. When a message arrives, the system selects an appropriately sized buffer from this pre-configured pool based on the message size, eliminating the need for interrupt-driven allocation and reducing processing overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The receiving processor autonomously selects and assigns buffers from its pre-configured pool based on message size information, without requiring interrupt signals for each allocation decision. This self-service mechanism reduces interrupt frequency while maintaining efficient buffer utilization.

Inventive Principle:
Principle #25Self-service

3Speed

If memory pointers are exchanged between processors to enable direct memory access, then message transfer speed is improved, but this creates security vulnerabilities allowing unauthorized memory access

Engineering Contradiction:
Improvemessage transfer speedVSAvoidmemory access security
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The dangerous element (memory pointers) is extracted from the communication protocol. Instead of exchanging pointers that could lead to unauthorized access, the system uses indexed references to pre-allocated buffers. This extraction maintains fast memory access while eliminating the security vulnerability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

An intermediary indexing mechanism is introduced between the sending and receiving processors. Instead of direct pointer exchange, the sending processor provides an index that the receiving processor uses to select from its own buffer pool. This intermediary layer enables fast access while preventing unauthorized memory operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Loss of substance

If dynamic buffer allocation is performed for each message based on its size, then memory slack is minimized, but this requires interrupt signals and dynamic allocation procedures that degrade performance

Engineering Contradiction:
Improvememory slackVSAvoidmessage processing throughput
Core Design Contradiction:
Loss of substanceVSProductivity

Solution Approach 1:

The continuous memory space is segmented into discrete fixed-size buffers of various dimensions, organized in a buffer pool. This segmentation allows efficient packing of messages of different sizes into appropriately sized buffers, minimizing slack without requiring dynamic allocation for each message.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The receiving processor maintains a universal buffer pool that can accommodate messages of various sizes. Different buffers in the pool serve different message size requirements, allowing the system to handle variable-length messages efficiently without dynamic allocation while minimizing memory waste.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2017741B1System,processor,apparatus and method for inter-processor communication
Publication Date: 2017.11.22 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • EP2017741B1 patent drawingFigure 1~2
  • EP2017741B1 patent drawingFigure 3A~4B
  • EP2017741B1 patent drawingFigure 5~6

AI summary

A multi-processor system comprises a sending processor adapted to send a data message, a receiving processor adapted to receive the data message, and a memory unit associated with the receiving processor. The multi-processor system has a size-index table associated with the sending processor, and the sending processor is adapted to map a size of a payload portion of the data message to an index of the size-index table, and to send the data message containing the size, the index and the payload portion to the receiving processor. The multi-processor system also has mapping circuitry associated with the receiving processor. The mapping circuitry is adapted to map the index contained in the data message received from the sending processor to a pointer, wherein the pointer is associated with a buffer of the memory unit. The receiving processor is adapted to write the payload portion of the received data message to the buffer as indicated by the pointer. A receiving processor adapted to be comprised in a multi-processor system, an electronic apparatus comprising a multi-processor system and/or a receiving processor are also described as well as a method of receiving a data message at a processor.