Skewed Double Differential Pair Offset Cancellation Circuit
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Solution Overview
Problem
Differential transistor pairs in circuits suffer from offset inaccuracies due to manufacturing variations and operational changes, leading to performance degradation, with existing solutions either reducing operating frequency or increasing circuit area and cost.
Innovation Solution
A differential system using two parallel differential transistor pairs intentionally skewed in opposite directions, with a calibration method to adjust biases and cancel offset by equating input potentials and comparing outputs to determine and correct offset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If larger transistors are used to average out random variations and reduce offset, then offset is reduced, but parasitic capacitance increases and circuit area increases
Solution Approach 1:
The differential pair is divided into two separate differential transistor pairs (first and second differential pairs) with independent biases. Each pair is skewed in opposite directions, allowing the offset errors to cancel each other out when combined, rather than requiring a single large transistor to average out the variations.
Solution Approach 2:
The first and second differential pairs are intentionally skewed asymmetrically in opposite directions. The first differential pair has a positive skew while the second has a negative skew of equal magnitude, creating complementary offset errors that cancel when combined at the output.
2Manufacturing precision
If closed-loop feedback configuration with capacitor is used to store offset voltage, then offset cancellation is achieved, but maximum operating frequency is reduced significantly
Solution Approach 1:
The offset cancellation is performed preliminarily during a calibration mode before normal operation. The biases of the first and second differential pairs are adjusted while inputs are shorted to equi-potential, canceling offset in advance. During functional mode, the calibrated biases are maintained without requiring feedback capacitors or iterative adjustment.
3Manufacturing precision
If open-loop calibration with additional circuit elements is used to reduce offset, then offset is reduced below threshold, but maximum operating frequency is reduced
Solution Approach 1:
Offset calibration is performed in advance during a dedicated calibration mode using a simple equi-potential connection and output comparison. The biases are adjusted preliminarily to cancel offset, and then the circuit operates in functional mode with the pre-calibrated biases, avoiding the need for additional calibration circuit elements during operation.
Solution Approach 2:
The calibration function is extracted as a separate operational mode rather than requiring continuous calibration circuitry. During calibration mode, inputs are connected to equi-potential and output is compared to determine bias adjustments. During functional mode, the calibrated biases are simply maintained without active calibration elements in the signal path.
Data Source
AI summary
A differential system producing differential signals with offset cancellation utilizing a double differential input pair system is disclosed. It uses two parallel differential transistor pairs which are intentionally skewed. Nominally, the differential pairs are skewed in opposite direction from each, but with equal magnitude, so that the combination of the two differential pairs is nominally balanced. The current through each differential pair is then increased or decreased until any offset is sufficiently cancelled, using a selection means for providing an equi-potential value to first and second differential inputs in a calibration mode of the system and a comparison means for comparing first and second differential outputs in a calibration mode to determine the offset of the system.