Skip Coding for 3.5 Bits Per Cell NAND Memory Storage
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Solution Overview
Problem
Current 3D NAND memory technologies face challenges in efficiently storing fractional numbers of bits per cell, particularly with bit puncturing methods that result in data loss and asymmetric error rates, making it difficult to achieve cost-effective storage solutions between TLCs and QLCs.
Innovation Solution
The method of skip coding, where user data is encoded into an upper page, a middle page, a lower page, and a half page, with data stored in the half page only when the upper page bit is 0, and error correction codes are symmetrically applied across all pages, allowing for storage of 3.5 bits per cell without data loss and maintaining balanced error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If bit puncturing method is used to store fractional bits per cell, then storage density is improved, but data loss increases due to asymmetric error rates
Solution Approach 1:
The patent divides the data storage into multiple pages (upper page, middle page, lower page, and half page) with different storage capacities. Each page is segmented to store specific portions of the 3.5 bits per cell data, allowing systematic handling of fractional bit storage without uniform data loss across all cells.
Solution Approach 2:
The patent applies asymmetric error correction by using different error correction codes for different pages. The upper page uses a first error correction code while the half page uses a second error correction code, creating asymmetric protection that compensates for the inherent asymmetry in bit puncturing patterns and reduces overall data loss.
2Reliability
If symmetric error correction is applied across all pages, then error correction balance is improved, but complexity of error correction increases
Solution Approach 1:
The patent changes the error correction parameters differently for different pages. By using a first error correction code for the upper page and a second error correction code for the half page, it achieves balanced error correction across pages while managing complexity through parameter differentiation rather than uniform complex processing.
3Quantity of substance
If 3.5 bits per cell storage is implemented using bit puncturing, then storage capacity is improved, but manufacturing precision requirements increase due to asymmetric error rates
Solution Approach 1:
The patent applies error correction codes in advance during the encoding process, before data is stored in the memory cells. By preliminarily correcting potential errors through coding schemes and distributing data across multiple pages with appropriate error correction, it reduces the precision requirements during manufacturing and reading operations.
Data Source
AI summary
An apparatus and method of skip coding user data is provided. According to skip coding, for each cell in which an upper page is 0, data is stored in a half page. For each portion of data in which the upper page is 1, data is not stored in the half page. Thus, cells of a NAND memory may each store 3.5 bits, in one of twelve available states.


